Merge changes from github followup.
PiperOrigin-RevId: 160183498
This commit is contained in:
parent
0a6d5cda49
commit
b91b5baab2
@ -208,6 +208,7 @@ filegroup(
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"//tensorflow/compiler/jit/kernels:all_files",
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"//tensorflow/compiler/jit/kernels:all_files",
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"//tensorflow/compiler/jit/legacy_flags:all_files",
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"//tensorflow/compiler/jit/legacy_flags:all_files",
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"//tensorflow/compiler/jit/ops:all_files",
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"//tensorflow/compiler/jit/ops:all_files",
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"//tensorflow/compiler/plugin/executor:all_files",
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"//tensorflow/compiler/tests:all_files",
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"//tensorflow/compiler/tests:all_files",
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"//tensorflow/compiler/tf2xla:all_files",
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"//tensorflow/compiler/tf2xla:all_files",
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"//tensorflow/compiler/tf2xla/cc:all_files",
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"//tensorflow/compiler/tf2xla/cc:all_files",
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@ -15,7 +15,10 @@ package_group(
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)
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)
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package(
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package(
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default_visibility = [":internal"],
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default_visibility = [
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":internal",
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"//tensorflow/compiler/plugin/executor:__pkg__",
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],
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)
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)
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load("//tensorflow:tensorflow.bzl", "cc_header_only_library")
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load("//tensorflow:tensorflow.bzl", "cc_header_only_library")
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@ -2,6 +2,7 @@ licenses(["notice"]) # Apache 2.0
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package(
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package(
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default_visibility = [
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default_visibility = [
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"//tensorflow/compiler/plugin/executor:__pkg__",
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"//tensorflow/compiler/tf2xla:internal",
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"//tensorflow/compiler/tf2xla:internal",
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],
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],
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)
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)
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@ -11,9 +11,11 @@ cc_library(
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"*.h",
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"*.h",
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]),
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]),
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deps = [
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deps = [
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"//tensorflow/compiler/jit:xla_device",
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"//tensorflow/compiler/jit:xla_jit_headers_lib",
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"//tensorflow/compiler/jit:xla_jit_headers_lib",
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"//tensorflow/compiler/tf2xla:xla_compiler",
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"//tensorflow/compiler/xla:xla_headers_lib",
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"//tensorflow/compiler/xla:xla_headers_lib",
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"//tensorflow/compiler/xla/service:hlo_evaluator",
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"//tensorflow/compiler/xla/service",
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"//third_party/eigen3",
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"//third_party/eigen3",
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"@local_config_cuda//cuda:cuda_headers",
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"@local_config_cuda//cuda:cuda_headers",
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"@protobuf//:protobuf_headers",
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"@protobuf//:protobuf_headers",
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@ -175,6 +175,11 @@ tf_xla_py_test(
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name = "slice_ops_test",
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name = "slice_ops_test",
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size = "small",
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size = "small",
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srcs = ["slice_ops_test.py"],
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srcs = ["slice_ops_test.py"],
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# TODO(b/62962492): Test fails with assertion error.
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tags = [
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"manual",
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"notap",
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],
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deps = [
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deps = [
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":xla_test",
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":xla_test",
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"//tensorflow/python:array_ops",
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"//tensorflow/python:array_ops",
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@ -456,6 +461,11 @@ cuda_py_test(
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"//tensorflow/python:math_ops",
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"//tensorflow/python:math_ops",
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"//tensorflow/python:nn_ops",
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"//tensorflow/python:nn_ops",
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],
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],
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# TODO(b/62961789): Test fails with SIGABRT
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tags = [
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"manual",
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"notap",
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],
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)
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)
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cc_library(
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cc_library(
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@ -524,8 +534,12 @@ cuda_py_test(
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# --dump_graph_dir, and the config file was written by hand.
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# --dump_graph_dir, and the config file was written by hand.
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#
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#
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# Run the following to build a minimal benchmark of the computation on Android:
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# Run the following to build a minimal benchmark of the computation on Android:
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# $ bazel build -c opt --config=android_arm \
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# $ bazel build -c opt --cxxopt='-std=c++11' --linkopt='-lm' \
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# third_party/tensorflow/compiler/tests:lstm_layer_inference_benchmark
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# --cpu=armeabi-v7a \
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# --host_crosstool_top=@bazel_tools//tools/cpp:toolchain \
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# --crosstool_top=//external:android/crosstool \
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# //tensorflow/compiler/tests:lstm_layer_inference_benchmark
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#
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#
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# Currently the resulting binary size is ~190KB
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# Currently the resulting binary size is ~190KB
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tf_library(
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tf_library(
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@ -260,11 +260,7 @@ def index_to_string(tensor, mapping, default_value="UNK", name=None):
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For example:
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For example:
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```python
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```python
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<<<<<<< HEAD
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mapping_string = tf.constant(["emerson", "lake", "palmer"])
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mapping_string = tf.constant(["emerson", "lake", "palmer"])
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=======
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mapping_string = tf.constant(["emerson", "lake", "palmer")
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>>>>>>> 338a7ead4475d6b97b420d6d1c56ff66815e3e7b
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indices = tf.constant([1, 5], tf.int64)
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indices = tf.constant([1, 5], tf.int64)
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values = tf.contrib.lookup.index_to_string(
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values = tf.contrib.lookup.index_to_string(
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indices, mapping=mapping_string, default_value="UNKNOWN")
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indices, mapping=mapping_string, default_value="UNKNOWN")
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@ -1,305 +0,0 @@
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/* Copyright 2016 The TensorFlow Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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// See docs in ../ops/sparse_ops.cc.
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#define EIGEN_USE_THREADS
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#include "tensorflow/core/framework/op_kernel.h"
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#include "tensorflow/core/framework/register_types.h"
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#include "tensorflow/core/framework/tensor.h"
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#include "tensorflow/core/framework/tensor_util.h"
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#include "tensorflow/core/framework/types.h"
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#include "tensorflow/core/util/sparse/sparse_tensor.h"
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// TODO(b/31496047): Fix non-standard include order.
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#include <numeric> // clang-format off
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using tensorflow::sparse::SparseTensor;
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using tensorflow::gtl::ArraySlice;
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namespace tensorflow {
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struct ReduceDetails {
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// The dimensions to call Reorder() with.
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std::vector<int64> reorder_dims;
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// The dimensions to call group() with after Reorder().
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std::vector<int64> group_by_dims;
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// The shape after reduction.
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TensorShape reduced_shape;
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};
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// Compute common reduce parameters that'll be used for SparseTensor
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// reductions. Usage:
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// ReduceDetails reduction = SparseTensorReduceHelper(sp, axes, keep_dims);
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// sp.Reorder(reduction.reorder_dims);
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// for (const auto& g : sp.group(reduction.group_by_dims)) {
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// ...
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// }
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// // Set output shape to reduction.reduced_shape.
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ReduceDetails SparseTensorReduceHelper(const SparseTensor &sp,
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gtl::ArraySlice<int32> axes_slice,
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bool keep_dims) {
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ReduceDetails reduction;
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std::vector<int32> reduction_axes(axes_slice.begin(), axes_slice.end());
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int ndims = sp.dims();
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for (int64 i = 0; i < reduction_axes.size(); ++i) {
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reduction_axes[i] = (reduction_axes[i] + ndims) % ndims;
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}
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std::sort(reduction_axes.begin(), reduction_axes.end());
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// (0) Calculate the grouping dimensions:
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// group_by_dims == {0, .., NDIMS-1} \ reduction_axes.
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std::vector<int64> perm(ndims);
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std::iota(perm.begin(), perm.end(), 0);
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// Requires perm and reduction_axes_ be sorted; group_by_dims will be
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// sorted as well.
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std::set_difference(
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perm.begin(), perm.end(), reduction_axes.begin(), reduction_axes.end(),
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std::inserter(reduction.group_by_dims, reduction.group_by_dims.begin()));
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// Now append the rest of the axes (the complement of group_by_dims_);
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// result is used by Reorder().
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reduction.reorder_dims = reduction.group_by_dims;
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std::set_difference(perm.begin(), perm.end(), reduction.group_by_dims.begin(),
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reduction.group_by_dims.end(),
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std::back_inserter(reduction.reorder_dims));
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// (1) Calculate the shape after reduction.
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auto sp_shape = sp.shape();
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std::vector<int64> out_dim_sizes;
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if (keep_dims) {
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out_dim_sizes.reserve(ndims);
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auto beg = reduction.group_by_dims.begin();
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auto end = reduction.group_by_dims.end();
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for (int d = 0; d < ndims; ++d) {
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if (std::find(beg, end, d) == end) {
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out_dim_sizes.push_back(1); // A reduced axis.
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} else {
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out_dim_sizes.push_back(sp_shape[d]);
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}
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}
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} else {
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out_dim_sizes = sp.PickDims(reduction.group_by_dims);
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}
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reduction.reduced_shape = TensorShape(out_dim_sizes);
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return reduction;
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}
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Status ValidateInputs(const Tensor *shape_t, const Tensor *reduction_axes_t) {
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// indices and values are validated in SparseTensor ctor.
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if (!TensorShapeUtils::IsVector(shape_t->shape())) {
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return errors::InvalidArgument(
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"Expected input_shape to be a vector; got shape: ",
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shape_t->shape().DebugString());
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}
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if (!TensorShapeUtils::IsScalar(reduction_axes_t->shape()) &&
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!TensorShapeUtils::IsVector(reduction_axes_t->shape())) {
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return errors::InvalidArgument(
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"Expected reduction_axes to be a scalar or a vector; got shape: ",
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reduction_axes_t->shape().DebugString());
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}
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const auto reduction_axes_flat = reduction_axes_t->flat<int32>();
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for (int64 i = 0; i < reduction_axes_flat.size(); i++) {
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int32 axis = reduction_axes_flat(i);
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if (axis < -shape_t->NumElements() || axis >= shape_t->NumElements()) {
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return errors::InvalidArgument("Invalid reduction dimension ", axis,
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", for input with ",
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shape_t->NumElements(), " dimensions.");
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}
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}
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return Status::OK();
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}
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template <typename T>
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class SparseReduceSumOp : public OpKernel {
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public:
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explicit SparseReduceSumOp(OpKernelConstruction *ctx) : OpKernel(ctx) {
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OP_REQUIRES_OK(ctx, ctx->GetAttr("keep_dims", &keep_dims_));
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}
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void Compute(OpKernelContext *ctx) override {
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const Tensor *indices_t, *values_t, *shape_t, *reduction_axes_t;
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OP_REQUIRES_OK(ctx, ctx->input("input_indices", &indices_t));
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OP_REQUIRES_OK(ctx, ctx->input("input_values", &values_t));
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OP_REQUIRES_OK(ctx, ctx->input("input_shape", &shape_t));
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OP_REQUIRES_OK(ctx, ctx->input("reduction_axes", &reduction_axes_t));
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OP_REQUIRES_OK(ctx, ValidateInputs(shape_t, reduction_axes_t));
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// TODO(zongheng): we will call Reorder() below, which will modify
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// in-place the underlying indices and values buffers. To avoid
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// surprises of this kernel being stateful, we work around the above by
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// making deep copies here. Remove this if/when we change Reorder()'s
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// semantics.
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const auto shape_vec = shape_t->vec<int64>();
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SparseTensor sp(tensor::DeepCopy(*indices_t), tensor::DeepCopy(*values_t),
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TensorShape(shape_vec));
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ReduceDetails reduction = SparseTensorReduceHelper(
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sp, reduction_axes_t->flat<int32>(), keep_dims_);
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Tensor *out_values;
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OP_REQUIRES_OK(
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ctx, ctx->allocate_output(0, reduction.reduced_shape, &out_values));
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auto out_flat = out_values->flat<T>();
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out_flat.setZero();
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Tensor tmp_group_sum;
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OP_REQUIRES_OK(ctx, ctx->allocate_temp(DataTypeToEnum<T>::value,
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TensorShape({}), &tmp_group_sum));
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auto group_sum = tmp_group_sum.scalar<T>();
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// Compute strides, and use it to convert coords to flat index. The
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// coordinates returned by .group() have the same ndims as group_by_dims.
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gtl::InlinedVector<int64, 8> output_strides(reduction.group_by_dims.size());
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if (!output_strides.empty()) { // Do this iff we don't reduce all.
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output_strides.back() = 1;
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for (int d = output_strides.size() - 2; d >= 0; --d) {
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output_strides[d] =
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output_strides[d + 1] * shape_vec(reduction.group_by_dims[d + 1]);
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}
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}
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auto CoordinatesToFlatIndex = [](ArraySlice<int64> coords,
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ArraySlice<int64> strides) {
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if (strides.empty()) { // Reduce all.
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return 0LL;
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}
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CHECK_EQ(coords.size(), strides.size());
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int64 idx = 0;
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for (int i = 0; i < coords.size(); ++i) {
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idx += coords[i] * strides[i];
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}
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return idx;
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};
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// Each group maps one-on-one onto a value in the reduced tensor.
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// g.group() provides the coordinates of a particular reduced value.
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sp.Reorder<T>(reduction.reorder_dims);
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for (const auto &g : sp.group(reduction.group_by_dims)) {
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group_sum.device(ctx->eigen_cpu_device()) = g.template values<T>().sum();
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const int64 idx = CoordinatesToFlatIndex(g.group(), output_strides);
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out_flat(idx) = group_sum();
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VLOG(2) << "coords: " << str_util::Join(g.group(), ",")
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<< "; idx: " << idx << "; group sum: " << group_sum();
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}
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}
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private:
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// True if the number of dimensions should be maintained.
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bool keep_dims_;
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};
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#define REGISTER_KERNELS(T) \
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REGISTER_KERNEL_BUILDER( \
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Name("SparseReduceSum").Device(DEVICE_CPU).TypeConstraint<T>("T"), \
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SparseReduceSumOp<T>)
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TF_CALL_NUMBER_TYPES(REGISTER_KERNELS);
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#undef REGISTER_KERNELS
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template <typename T>
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class SparseReduceSumSparseOp : public OpKernel {
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public:
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explicit SparseReduceSumSparseOp(OpKernelConstruction *ctx) : OpKernel(ctx) {
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OP_REQUIRES_OK(ctx, ctx->GetAttr("keep_dims", &keep_dims_));
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}
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void Compute(OpKernelContext *ctx) override {
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const Tensor *indices_t, *values_t, *shape_t, *reduction_axes_t;
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OP_REQUIRES_OK(ctx, ctx->input("input_indices", &indices_t));
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OP_REQUIRES_OK(ctx, ctx->input("input_values", &values_t));
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OP_REQUIRES_OK(ctx, ctx->input("input_shape", &shape_t));
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OP_REQUIRES_OK(ctx, ctx->input("reduction_axes", &reduction_axes_t));
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OP_REQUIRES_OK(ctx, ValidateInputs(shape_t, reduction_axes_t));
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SparseTensor sp(tensor::DeepCopy(*indices_t), tensor::DeepCopy(*values_t),
|
|
||||||
TensorShape(shape_t->vec<int64>()));
|
|
||||||
ReduceDetails reduction = SparseTensorReduceHelper(
|
|
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sp, reduction_axes_t->flat<int32>(), keep_dims_);
|
|
||||||
|
|
||||||
sp.Reorder<T>(reduction.reorder_dims);
|
|
||||||
// Count nnzs in the output SparseTensor.
|
|
||||||
int64 nnz = 0;
|
|
||||||
auto iter = sp.group(reduction.group_by_dims);
|
|
||||||
for (auto it = iter.begin(); it != iter.end(); ++it) {
|
|
||||||
nnz++;
|
|
||||||
}
|
|
||||||
|
|
||||||
Tensor *out_indices_t;
|
|
||||||
OP_REQUIRES_OK(ctx,
|
|
||||||
ctx->allocate_output(
|
|
||||||
0, TensorShape({nnz, reduction.reduced_shape.dims()}),
|
|
||||||
&out_indices_t));
|
|
||||||
typename TTypes<int64>::Matrix out_indices_mat =
|
|
||||||
out_indices_t->matrix<int64>();
|
|
||||||
// For keep_dims. We don't explicitly set dim fields for reduced dims below.
|
|
||||||
out_indices_mat.setZero();
|
|
||||||
|
|
||||||
Tensor *out_values_t;
|
|
||||||
OP_REQUIRES_OK(ctx,
|
|
||||||
ctx->allocate_output(1, TensorShape({nnz}), &out_values_t));
|
|
||||||
auto out_flat = out_values_t->flat<T>();
|
|
||||||
|
|
||||||
Tensor tmp_group_sum;
|
|
||||||
OP_REQUIRES_OK(ctx, ctx->allocate_temp(DataTypeToEnum<T>::value,
|
|
||||||
TensorShape({}), &tmp_group_sum));
|
|
||||||
auto group_sum = tmp_group_sum.scalar<T>();
|
|
||||||
int64 i = 0;
|
|
||||||
for (const auto &g : sp.group(reduction.group_by_dims)) {
|
|
||||||
group_sum.device(ctx->eigen_cpu_device()) = g.template values<T>().sum();
|
|
||||||
std::vector<int64> group = g.group();
|
|
||||||
for (int64 j = 0; j < group.size(); j++) {
|
|
||||||
if (keep_dims_) {
|
|
||||||
out_indices_mat(i, reduction.group_by_dims[j]) = group[j];
|
|
||||||
} else {
|
|
||||||
out_indices_mat(i, j) = group[j];
|
|
||||||
}
|
|
||||||
}
|
|
||||||
out_flat(i) = group_sum();
|
|
||||||
i++;
|
|
||||||
VLOG(2) << "coords: " << str_util::Join(g.group(), ",")
|
|
||||||
<< "; group sum: " << group_sum();
|
|
||||||
}
|
|
||||||
|
|
||||||
Tensor *out_shape_t;
|
|
||||||
OP_REQUIRES_OK(ctx, ctx->allocate_output(
|
|
||||||
2, TensorShape({reduction.reduced_shape.dims()}),
|
|
||||||
&out_shape_t));
|
|
||||||
auto out_shape_flat = out_shape_t->flat<int64>();
|
|
||||||
auto out_dim_sizes = reduction.reduced_shape.dim_sizes();
|
|
||||||
std::copy(out_dim_sizes.begin(), out_dim_sizes.end(), &out_shape_flat(0));
|
|
||||||
}
|
|
||||||
|
|
||||||
private:
|
|
||||||
// True if the number of dimensions should be maintained.
|
|
||||||
bool keep_dims_;
|
|
||||||
};
|
|
||||||
|
|
||||||
#define REGISTER_KERNELS(T) \
|
|
||||||
REGISTER_KERNEL_BUILDER( \
|
|
||||||
Name("SparseReduceSumSparse").Device(DEVICE_CPU).TypeConstraint<T>("T"), \
|
|
||||||
SparseReduceSumSparseOp<T>)
|
|
||||||
TF_CALL_NUMBER_TYPES(REGISTER_KERNELS);
|
|
||||||
#undef REGISTER_KERNELS
|
|
||||||
|
|
||||||
} // namespace tensorflow
|
|
@ -3056,6 +3056,7 @@ py_test(
|
|||||||
srcs = ["client/session_clusterspec_prop_test.py"],
|
srcs = ["client/session_clusterspec_prop_test.py"],
|
||||||
srcs_version = "PY2AND3",
|
srcs_version = "PY2AND3",
|
||||||
tags = [
|
tags = [
|
||||||
|
"no_gpu",
|
||||||
"no_pip_gpu",
|
"no_pip_gpu",
|
||||||
],
|
],
|
||||||
deps = [
|
deps = [
|
||||||
@ -3080,6 +3081,7 @@ py_test(
|
|||||||
srcs = ["client/session_list_devices_test.py"],
|
srcs = ["client/session_list_devices_test.py"],
|
||||||
srcs_version = "PY2AND3",
|
srcs_version = "PY2AND3",
|
||||||
tags = [
|
tags = [
|
||||||
|
"no_gpu",
|
||||||
"no_pip_gpu",
|
"no_pip_gpu",
|
||||||
],
|
],
|
||||||
deps = [
|
deps = [
|
||||||
|
@ -19,7 +19,6 @@ from __future__ import division
|
|||||||
from __future__ import print_function
|
from __future__ import print_function
|
||||||
|
|
||||||
import numpy as np
|
import numpy as np
|
||||||
import unittest
|
|
||||||
|
|
||||||
from tensorflow.python.framework import constant_op
|
from tensorflow.python.framework import constant_op
|
||||||
from tensorflow.python.framework import dtypes
|
from tensorflow.python.framework import dtypes
|
||||||
@ -606,7 +605,6 @@ class SparseReduceTest(test_util.TensorFlowTestCase):
|
|||||||
self._compare(sp_t, reduction_axes, ndims, True, False)
|
self._compare(sp_t, reduction_axes, ndims, True, False)
|
||||||
self._compare(sp_t, reduction_axes, ndims, True, True)
|
self._compare(sp_t, reduction_axes, ndims, True, True)
|
||||||
|
|
||||||
@unittest.skipIf(np.__version__ == "1.13.0", "numpy 1.13 bug")
|
|
||||||
def testSimpleAndRandomInputs(self):
|
def testSimpleAndRandomInputs(self):
|
||||||
if np.__version__ == "1.13.0":
|
if np.__version__ == "1.13.0":
|
||||||
self.skipTest("numpy 1.13.0 bug")
|
self.skipTest("numpy 1.13.0 bug")
|
||||||
@ -646,7 +644,6 @@ class SparseReduceTest(test_util.TensorFlowTestCase):
|
|||||||
with self.assertRaisesOpError("Invalid reduction dimension 2"):
|
with self.assertRaisesOpError("Invalid reduction dimension 2"):
|
||||||
sparse_ops.sparse_reduce_max(sp_t, 2).eval()
|
sparse_ops.sparse_reduce_max(sp_t, 2).eval()
|
||||||
|
|
||||||
@unittest.skipIf(np.__version__ == "1.13.0", "numpy 1.13 bug")
|
|
||||||
def testGradient(self):
|
def testGradient(self):
|
||||||
if np.__version__ == "1.13.0":
|
if np.__version__ == "1.13.0":
|
||||||
self.skipTest("numpy 1.13.0 bug")
|
self.skipTest("numpy 1.13.0 bug")
|
||||||
|
Loading…
Reference in New Issue
Block a user