142 lines
5.1 KiB
C++
142 lines
5.1 KiB
C++
/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#ifndef TENSORFLOW_COMPILER_TF2TENSORRT_CONVERT_UTILS_H_
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#define TENSORFLOW_COMPILER_TF2TENSORRT_CONVERT_UTILS_H_
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#include <memory>
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#include <vector>
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#include "absl/algorithm/container.h"
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#include "tensorflow/core/framework/tensor_shape.h"
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#include "tensorflow/core/lib/core/status.h"
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#if GOOGLE_CUDA && GOOGLE_TENSORRT
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#include "third_party/tensorrt/NvInfer.h"
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#endif // GOOGLE_CUDA && GOOGLE_TENSORRT
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namespace tensorflow {
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namespace tensorrt {
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static constexpr char kCastOutputTypeAttrName[] = "DstT";
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class IONamePrefixes {
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public:
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static constexpr const char* const kInputPHName = "TensorRTInputPH_";
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static constexpr const char* const kOutputPHName = "TensorRTOutputPH_";
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};
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template <typename T>
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struct TrtDestroyer {
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void operator()(T* t) {
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if (t) t->destroy();
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}
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};
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template <typename T>
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using TrtUniquePtrType = std::unique_ptr<T, TrtDestroyer<T>>;
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enum class TrtPrecisionMode { FP32, FP16, INT8 };
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Status TrtPrecisionModeToName(TrtPrecisionMode mode, string* name);
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Status TrtPrecisionModeFromName(const string& name, TrtPrecisionMode* mode);
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// Define a hash function for vector<TensorShape> because it is used as the key
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// for the engine cache.
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struct VectorTensorShapeHasher {
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std::size_t operator()(const std::vector<TensorShape>& key) const {
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return std::hash<std::string>()(TensorShapeUtils::ShapeListString(key));
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}
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};
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#if GOOGLE_CUDA && GOOGLE_TENSORRT
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#define IS_TRT_VERSION_GE(major, minor, patch, build) \
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((NV_TENSORRT_MAJOR > major) || \
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(NV_TENSORRT_MAJOR == major && NV_TENSORRT_MINOR > minor) || \
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(NV_TENSORRT_MAJOR == major && NV_TENSORRT_MINOR == minor && \
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NV_TENSORRT_PATCH > patch) || \
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(NV_TENSORRT_MAJOR == major && NV_TENSORRT_MINOR == minor && \
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NV_TENSORRT_PATCH == patch && NV_TENSORRT_BUILD >= build))
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string DebugString(const nvinfer1::DimensionType type);
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string DebugString(const nvinfer1::Dims& dims);
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string DebugString(const nvinfer1::DataType trt_dtype);
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string DebugString(const nvinfer1::Permutation& permutation, int len);
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string DebugString(const nvinfer1::ITensor& tensor);
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string DebugString(const std::vector<nvinfer1::Dims>& dimvec);
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string DebugString(const std::vector<TensorShape>& shapes);
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string DebugString(const std::vector<PartialTensorShape>& shapes);
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inline bool HasStaticShape(const nvinfer1::Dims& dims) {
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if (dims.nbDims < 0) return false;
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for (int d = 0; d < dims.nbDims; ++d) {
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if (dims.d[d] < 0) return false;
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}
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return true;
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}
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inline bool HasStaticShape(std::vector<int> dims) {
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return !absl::c_any_of(dims, [](int i) { return i < 0; });
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}
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template <typename TensorShapeType>
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inline nvinfer1::Dims TensorShapeToTrtDims(const TensorShapeType& shape,
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bool ignore_first_dim) {
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nvinfer1::Dims trt_dims;
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const int offset = (ignore_first_dim ? 1 : 0);
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for (int i = offset; i < shape.dims(); i++) {
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trt_dims.d[i - offset] = shape.dim_size(i);
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}
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trt_dims.nbDims = shape.dims() - offset;
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return trt_dims;
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}
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Status TrtDimsToTensorShape(const std::vector<int>& trt_dims,
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bool use_implicit_batch, int batch_size,
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TensorShape& shape);
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Status TrtDimsToTensorShape(const nvinfer1::Dims trt_dims,
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bool use_implicit_batch, int batch_size,
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TensorShape& shape);
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Status TfTypeToTrtType(DataType tf_type, nvinfer1::DataType* trt_type);
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Status TrtTypeToTfType(nvinfer1::DataType trt_type, DataType* tf_type);
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// Returns a string that includes compile time TensorRT library version
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// information {Maj, Min, Patch}.
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string GetLinkedTensorRTVersion();
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// Returns a string that includes runtime time TensorRT library version
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// information {Maj, Min, Patch}.
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string GetLoadedTensorRTVersion();
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// Returns true if an engine built for cached_shapes can also run actual_shapes.
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bool AreShapesCompatible(const std::vector<TensorShape>& actual_shapes,
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const std::vector<TensorShape>& cached_shapes);
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// Returns the number of inputs for the engine, which also correspends to the
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// number of input tensors for the network. This can differ from the number of
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// input bindings, because the number of total input bindings equals the number
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// of profiles times the number of engine inputs.
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int GetNumberOfEngineInputs(const nvinfer1::ICudaEngine* engine);
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#endif // GOOGLE_CUDA && GOOGLE_TENSORRT
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} // namespace tensorrt
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} // namespace tensorflow
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#endif // TENSORFLOW_COMPILER_TF2TENSORRT_CONVERT_UTILS_H_
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