728afcb4e3
Manually updated the licenses in the files that are not excluded from a license check in the internal CI system, and removed these exclusions in the external CI system as well. The external exclusions that are not excluded internally are: * .bzl * .h5 * .tpl * .properties Will will fix these remaining discrepancies incrementally, as and when a PR touches such a file and runs afoul of the internal checks. See http://b/175315163#comment7 for more details.
36 lines
1.2 KiB
Plaintext
36 lines
1.2 KiB
Plaintext
# Copyright 2020 The TensorFlow Authors. All Rights Reserved.
|
|
#
|
|
# Licensed under the Apache License, Version 2.0 (the "License");
|
|
# you may not use this file except in compliance with the License.
|
|
# You may obtain a copy of the License at
|
|
#
|
|
# http://www.apache.org/licenses/LICENSE-2.0
|
|
#
|
|
# Unless required by applicable law or agreed to in writing, software
|
|
# distributed under the License is distributed on an "AS IS" BASIS,
|
|
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
# See the License for the specific language governing permissions and
|
|
# limitations under the License.
|
|
# ==============================================================================
|
|
|
|
:name: SiFive-FE310
|
|
:description: This script runs Zephyr RTOS shell sample on SiFive-FE310 platform.
|
|
|
|
$name?="SiFive-FE310"
|
|
|
|
using sysbus
|
|
mach create $name
|
|
machine LoadPlatformDescription @platforms/cpus/sifive-fe310.repl
|
|
|
|
$bin?=@/workspace/tensorflow/lite/micro/tools/make/gen/riscv32_mcu_riscv32_mcu/bin/micro_speech_test
|
|
|
|
showAnalyzer uart0 Antmicro.Renode.Analyzers.LoggingUartAnalyzer
|
|
logFile @/tmp/renode_riscv_log.txt
|
|
|
|
sysbus LoadELF $bin
|
|
|
|
sysbus Tag <0x10008000 4> "PRCI_HFROSCCFG" 0xFFFFFFFF
|
|
sysbus Tag <0x10008008 4> "PRCI_PLLCFG" 0xFFFFFFFF
|
|
|
|
cpu PerformanceInMips 320
|