Added versioning to ADD/SUB + some rework of the existing code.
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4180f945a7
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tensorflow/lite
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toco/tflite
tools/versioning
@ -100,19 +100,26 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
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// 8bit -> 8bit general quantized path, with general rescalings
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// as well as, 16bit -> 16bit with general rescalings
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bool pot_scale_16bit = false;
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bool pot_scale_16bit = true;
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bool input1_scale_is_pot = false;
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bool input2_scale_is_pot = false;
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bool output_scale_is_pot = false;
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int input1_scale_log2_rounded;
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int input2_scale_log2_rounded;
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int output_scale_log2_rounded;
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int input1_scale_log2_rounded{0};
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int input2_scale_log2_rounded{0};
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int output_scale_log2_rounded{0};
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if (input1->type == kTfLiteInt16 && input2->type == kTfLiteInt16 &&
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output->type == kTfLiteInt16) {
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// Check that param scale is POT
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// In case of 16-bit, there are two implementation:
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// the scale parameter is a general number
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// the scale parameter is POT and
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// zero_point is zero for inputs/output.
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pot_scale_16bit = (input1->params.zero_point == 0) &&
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(input2->params.zero_point == 0) &&
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(output->params.zero_point == 0);
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input1_scale_is_pot =
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CheckedLog2(input1->params.scale, &input1_scale_log2_rounded);
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@ -122,14 +129,14 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
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output_scale_is_pot =
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CheckedLog2(output->params.scale, &output_scale_log2_rounded);
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pot_scale_16bit = input1_scale_log2_rounded && input2_scale_log2_rounded &&
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output_scale_log2_rounded;
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pot_scale_16bit &=
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input1_scale_is_pot && input2_scale_is_pot && output_scale_is_pot;
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}
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data->pot_scale_16bit = pot_scale_16bit;
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if (output->type == kTfLiteUInt8 || output->type == kTfLiteInt8 ||
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pot_scale_16bit) {
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!pot_scale_16bit) {
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// 8bit -> 8bit general quantized path, with general rescalings
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// as well as, 16bit -> 16bit with general rescalings
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data->input1_offset = -input1->params.zero_point;
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@ -139,7 +146,7 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
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// The shift is set to 15 for 16-bit and 20 in case of 8-bit, accordingly.
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// In case of 16-bit we have 65535 << 15 which is less than 1 << 31,
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// therefore the addition will still fit in a 32 bit accumulator.
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data->left_shift = pot_scale_16bit ? 15 : 20;
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data->left_shift = !pot_scale_16bit ? 15 : 20;
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const double twice_max_input_scale =
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2 * std::max(input1->params.scale, input2->params.scale);
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const double real_input1_multiplier =
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@ -252,7 +259,7 @@ TfLiteStatus EvalAddQuantized(TfLiteContext* context, TfLiteNode* node,
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const TfLiteTensor* input2,
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TfLiteTensor* output) {
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if (output->type == kTfLiteUInt8 || output->type == kTfLiteInt8 ||
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data->pot_scale_16bit) {
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!data->pot_scale_16bit) {
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tflite::ArithmeticParams op_params;
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op_params.left_shift = data->left_shift;
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op_params.input1_offset = data->input1_offset;
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@ -88,7 +88,7 @@ BuiltinOpResolver::BuiltinOpResolver() {
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/* max_version */ 2);
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AddBuiltin(BuiltinOperator_ADD, Register_ADD(),
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/* min_version */ 1,
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/* max_version */ 2);
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/* max_version */ 4);
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AddBuiltin(BuiltinOperator_SPACE_TO_BATCH_ND, Register_SPACE_TO_BATCH_ND(),
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/* min_version */ 1,
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/* max_version */ 3);
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@ -139,7 +139,7 @@ BuiltinOpResolver::BuiltinOpResolver() {
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AddBuiltin(BuiltinOperator_DIV, Register_DIV());
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AddBuiltin(BuiltinOperator_SUB, Register_SUB(),
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/* min_version */ 1,
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/* max_version */ 3);
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/* max_version */ 5);
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AddBuiltin(BuiltinOperator_SPLIT, Register_SPLIT(), /* min_version */ 1,
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/* max_version */ 3);
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AddBuiltin(BuiltinOperator_SPLIT_V, Register_SPLIT_V(),
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@ -225,19 +225,26 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
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// 8bit -> 8bit general quantized path, with general rescalings
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// as well as, 16bit -> 16bit with general rescalings
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bool pot_scale_16bit = false;
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bool pot_scale_16bit = true;
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bool input1_scale_is_pot = false;
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bool input2_scale_is_pot = false;
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bool output_scale_is_pot = false;
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int input1_scale_log2_rounded;
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int input2_scale_log2_rounded;
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int output_scale_log2_rounded;
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int input1_scale_log2_rounded{0};
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int input2_scale_log2_rounded{0};
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int output_scale_log2_rounded{0};
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if (input1->type == kTfLiteInt16 && input2->type == kTfLiteInt16 &&
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output->type == kTfLiteInt16) {
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// Check that param scale is POT
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// In case of 16-bit, there are two implementation:
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// the scale parameter is a general number
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// the scale parameter is POT and
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// zero_point is zero for inputs/output.
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pot_scale_16bit = (input1->params.zero_point == 0) &&
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(input2->params.zero_point == 0) &&
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(output->params.zero_point == 0);
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input1_scale_is_pot =
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CheckedLog2(input1->params.scale, &input1_scale_log2_rounded);
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@ -247,14 +254,14 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
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output_scale_is_pot =
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CheckedLog2(output->params.scale, &output_scale_log2_rounded);
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pot_scale_16bit = input1_scale_log2_rounded && input2_scale_log2_rounded &&
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output_scale_log2_rounded;
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pot_scale_16bit &=
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input1_scale_is_pot && input2_scale_is_pot && output_scale_is_pot;
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}
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data->pot_scale_16bit = pot_scale_16bit;
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if (output->type == kTfLiteUInt8 || output->type == kTfLiteInt8 ||
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pot_scale_16bit) {
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!pot_scale_16bit) {
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TF_LITE_ENSURE_OK(context, PrepareGeneralSubOp(context, input1, input2,
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output, params, data, -1));
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} else if (output->type == kTfLiteInt16) {
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@ -348,7 +355,7 @@ void EvalQuantized(TfLiteContext* context, TfLiteNode* node,
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} else {
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TF_LITE_SUB(reference_integer_ops, Add, int8_t);
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}
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} else if (data->pot_scale_16bit) {
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} else if (!data->pot_scale_16bit) {
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if (need_broadcast) {
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TF_LITE_SUB(reference_ops, BroadcastAdd4DSlow, int16_t);
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} else {
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@ -49,11 +49,16 @@ string GetMinimumRuntimeVersionForModel(const Model& model) {
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{{OperatorType::kDepthwiseConv, 3}, "1.14.0"},
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{{OperatorType::kAdd, 1}, "1.5.0"},
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{{OperatorType::kAdd, 2}, "1.14.0"},
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{{OperatorType::kAdd, 3}, "1.15.0"},
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{{OperatorType::kAdd, 4}, kPendingReleaseOpVersion},
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{{OperatorType::kAddN, 1}, "1.14.0"},
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{{OperatorType::kSpaceToBatchND, 1}, "1.6.0"},
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{{OperatorType::kSpaceToBatchND, 2}, "1.14.0"},
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{{OperatorType::kSub, 1}, "1.6.0"},
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{{OperatorType::kSub, 2}, "1.14.0"},
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{{OperatorType::kSub, 3}, "1.15.0"},
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{{OperatorType::kSub, 4}, "1.15.0"},
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{{OperatorType::kSub, 5}, kPendingReleaseOpVersion},
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{{OperatorType::kDiv, 1}, "1.6.0"},
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{{OperatorType::kBatchToSpaceND, 1}, "1.6.0"},
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{{OperatorType::kBatchToSpaceND, 2}, "1.14.0"},
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@ -22,6 +22,7 @@ cc_library(
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"//tensorflow/core:tflite_portable_logging",
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"//tensorflow/lite:minimal_logging",
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"//tensorflow/lite/kernels/internal:compatibility",
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"//tensorflow/lite/kernels/internal:quantization_util",
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"//tensorflow/lite/schema:schema_fbs",
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"//tensorflow/lite/schema:schema_fbs_with_mutable",
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"@com_google_absl//absl/memory",
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@ -24,6 +24,7 @@ limitations under the License.
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#include "absl/strings/str_split.h"
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#include "tensorflow/core/platform/logging.h"
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#include "tensorflow/lite/kernels/internal/compatibility.h"
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#include "tensorflow/lite/kernels/internal/quantization_util.h"
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namespace tflite {
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namespace {
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@ -359,7 +360,29 @@ int GetBuiltinOperatorVersion(const OpSignature& op_sig) {
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}
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return 1;
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case BuiltinOperator_ADD:
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if (op_sig.input_types.at(0) == TensorType_INT16 &&
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op_sig.output_types.at(0) == TensorType_INT16) {
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if (op_sig.options.addsub.pot_scale_int16) {
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return 4;
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} else {
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return 3;
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}
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}
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if (op_sig.input_types.at(0) == TensorType_INT8) {
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return 2;
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}
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return 1;
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case BuiltinOperator_SUB:
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if (op_sig.input_types.at(0) == TensorType_INT16 &&
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op_sig.output_types.at(0) == TensorType_INT16) {
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if (op_sig.options.addsub.pot_scale_int16) {
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return 5;
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} else {
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return 4;
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}
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}
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if (op_sig.options.broadcast.need_broadcast &&
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op_sig.options.broadcast.num_dims > 4) {
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return 3;
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@ -370,7 +393,6 @@ int GetBuiltinOperatorVersion(const OpSignature& op_sig) {
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return 1;
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case BuiltinOperator_AVERAGE_POOL_2D:
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case BuiltinOperator_ADD:
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case BuiltinOperator_CONCATENATION:
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case BuiltinOperator_MAX_POOL_2D:
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case BuiltinOperator_PAD:
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@ -487,6 +509,53 @@ OpSignature GetOpSignature(const OperatorCode* op_code, const Operator* op,
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}
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} break;
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case BuiltinOperator_ADD:
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case BuiltinOperator_SUB: {
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op_sig.options.addsub.pot_scale_int16 = false;
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const Tensor* input1_tensor =
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subgraph->tensors()->Get(op->inputs()->Get(0));
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const Tensor* input2_tensor =
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subgraph->tensors()->Get(op->inputs()->Get(1));
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const Tensor* output_tensor =
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subgraph->tensors()->Get(op->outputs()->Get(0));
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const QuantizationParameters* input1_quant =
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input1_tensor->quantization();
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const QuantizationParameters* input2_quant =
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input2_tensor->quantization();
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const QuantizationParameters* output_quant =
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output_tensor->quantization();
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if (input1_quant && input1_quant->scale() &&
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input1_quant->scale()->Length() && input2_quant &&
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input2_quant->scale() && input2_quant->scale()->Length() &&
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output_quant && output_quant->scale() &&
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output_quant->scale()->Length()) {
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float input1_scale = input1_quant->scale()->Get(0);
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float input2_scale = input2_quant->scale()->Get(0);
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float output_scale = output_quant->scale()->Get(0);
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int scale_log2_rounded = 0;
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bool input1_scale_is_pot =
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CheckedLog2(input1_scale, &scale_log2_rounded);
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bool input2_scale_is_pot =
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CheckedLog2(input2_scale, &scale_log2_rounded);
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bool output_scale_is_pot =
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CheckedLog2(output_scale, &scale_log2_rounded);
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op_sig.options.addsub.pot_scale_int16 =
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input1_scale_is_pot && input2_scale_is_pot && output_scale_is_pot;
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}
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if (op_code->builtin_code() == BuiltinOperator_SUB) {
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op_sig.options.broadcast.need_broadcast =
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!HaveSameShapes(subgraph, op, 0, 1);
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op_sig.options.broadcast.num_dims =
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std::max(GetNumDims(subgraph, op, 0), GetNumDims(subgraph, op, 1));
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}
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} break;
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case BuiltinOperator_LSTM: {
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auto lstm_option = op->builtin_options_as_LSTMOptions();
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if (lstm_option) {
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@ -512,7 +581,6 @@ OpSignature GetOpSignature(const OperatorCode* op_code, const Operator* op,
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op_sig.options.space_batch.num_dims = GetNumDims(subgraph, op, 0);
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} break;
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case BuiltinOperator_SUB:
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case BuiltinOperator_MAXIMUM:
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case BuiltinOperator_MINIMUM: {
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op_sig.options.broadcast.need_broadcast =
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@ -59,6 +59,9 @@ typedef struct {
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int32_t num_dims;
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bool need_broadcast;
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} broadcast;
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struct {
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bool pot_scale_int16;
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} addsub;
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} options;
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} OpSignature;
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