Merge pull request #36191 from ROCmSoftwarePlatform:google-upstream-pr-enable-passes-amdgpu_compiler
PiperOrigin-RevId: 294239845 Change-Id: I905c62570b73021a8275dd2925d5badb0af1ceee
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cf35e6540f
@ -1278,6 +1278,9 @@ cc_library(
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":gpu_conv_padding_legalization",
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":gpu_conv_rewriter",
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":gpu_layout_assignment",
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":reduction_degenerate_dim_remover",
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":reduction_dimension_grouper",
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":reduction_layout_normalizer",
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":target_constants",
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"//tensorflow/compiler/xla:statusor",
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"//tensorflow/compiler/xla/service:algebraic_simplifier",
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@ -22,6 +22,9 @@ limitations under the License.
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#include "tensorflow/compiler/xla/service/gpu/gpu_conv_rewriter.h"
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#include "tensorflow/compiler/xla/service/gpu/gpu_layout_assignment.h"
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#include "tensorflow/compiler/xla/service/gpu/llvm_gpu_backend/gpu_backend_lib.h"
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#include "tensorflow/compiler/xla/service/gpu/reduction_degenerate_dim_remover.h"
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#include "tensorflow/compiler/xla/service/gpu/reduction_dimension_grouper.h"
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#include "tensorflow/compiler/xla/service/gpu/reduction_layout_normalizer.h"
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#include "tensorflow/compiler/xla/service/gpu/target_constants.h"
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#include "tensorflow/compiler/xla/service/hlo_constant_folding.h"
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#include "tensorflow/compiler/xla/service/hlo_cse.h"
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@ -92,6 +95,10 @@ Status AMDGPUCompiler::OptimizeHloPostLayoutAssignment(
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/*allow_mixed_precision=*/false,
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LayoutAssignment::InstructionCanChangeLayout);
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pipeline.AddPass<ReductionDegenerateDimRemover>();
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pipeline.AddPass<ReductionLayoutNormalizer>();
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pipeline.AddPass<ReductionDimensionGrouper>();
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// The LayoutAssignment pass may leave behind kCopy instructions which are
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// duplicate or NOPs, so remove them with algebraic simplification and CSE.
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AlgebraicSimplifierOptions options;
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