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Reduce binary size for Tensilica builds

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Here's the size of a test binary before this change:
xt-size tensorflow/lite/micro/tools/make/gen/xtensa-xpg_xtensa-xpg/bin/micro_interpreter_test
   text	   data	    bss	    dec	    hex	filename
  79416	  21272	   7520	 108208	  1a6b0	tensorflow/lite/micro/tools/make/gen/xtensa-xpg_xtensa-xpg/bin/micro_interpreter_test

After:
xt-size tensorflow/lite/micro/tools/make/gen/xtensa-xpg_xtensa-xpg/bin/micro_interpreter_test
   text	   data	    bss	    dec	    hex	filename
  70912	  20104	   7504	  98520	  180d8	tensorflow/lite/micro/tools/make/gen/xtensa-xpg_xtensa-xpg/bin/micro_interpreter_test

This saves us about 10KB of binary footprint.

PiperOrigin-RevId: 293441475
Change-Id: I954efbecb819613c53435575c997544e7e002c3c
This commit is contained in:
Pete Warden 2020-02-05 13:44:51 -08:00 committed by TensorFlower Gardener
parent 2496d2ba02
commit c376fe13ae
1 changed files with 5 additions and 1 deletions
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6
tensorflow/lite/micro/tools/make/targets/xtensa_xpg_makefile.inc
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@ -14,7 +14,9 @@ ifeq ($(TARGET), xtensa-xpg)
--xtensa-core=$(XTENSA_CORE) \ --xtensa-core=$(XTENSA_CORE) \
-mcoproc \ -mcoproc \
-O3 \ -O3 \
-DXTENSA -DMAX_RFFT_PWR=9 -DMIN_RFFT_PWR=MAX_RFFT_PWR -fdata-sections \ -DXTENSA -DMAX_RFFT_PWR=9 -DMIN_RFFT_PWR=MAX_RFFT_PWR \
-fdata-sections \
-ffunction-sections \
-fmessage-length=0 -fmessage-length=0
TARGET_TOOLCHAIN_PREFIX := xt- TARGET_TOOLCHAIN_PREFIX := xt-
@ -24,6 +26,8 @@ ifeq ($(TARGET), xtensa-xpg)
CXXFLAGS = $(PLATFORM_ARGS) -std=c++11 CXXFLAGS = $(PLATFORM_ARGS) -std=c++11
CCFLAGS = $(PLATFORM_ARGS) -std=c11 CCFLAGS = $(PLATFORM_ARGS) -std=c11
LDFLAGS += -Wl,-gc-sections
TEST_SCRIPT := tensorflow/lite/micro/testing/test_xtensa_xpg_binary.sh TEST_SCRIPT := tensorflow/lite/micro/testing/test_xtensa_xpg_binary.sh
# These are microcontroller-specific rules for converting the ELF output # These are microcontroller-specific rules for converting the ELF output