Integrate LLVM at llvm/llvm-project@33945cdd62
Updates LLVM usage to match [33945cdd62c4](https://github.com/llvm/llvm-project/commit/33945cdd62c4) PiperOrigin-RevId: 340556042 Change-Id: Id99605800c4c095597b63b822e307edf3da3aa5b
This commit is contained in:
parent
1e228f57d2
commit
b37cacd6ea
@ -289,7 +289,8 @@ Status ConvertMLIRToTFLiteFlatBuffer(
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absl::StrCat(toco_flags.dump_graphviz_dir(), "/toco_AT_IMPORT.dot")));
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}
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mlir::PassManager pm(module->getContext());
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mlir::PassManager pm(module->getContext(),
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mlir::OpPassManager::Nesting::Implicit);
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tensorflow::AddTFToTFLConversionPasses(pass_config, &pm, session);
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// Convert back to outlined while format for export back to flatbuffer.
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@ -75,7 +75,7 @@ TfLiteStatus QuantizeModel(
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}
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// Apply quantization passes
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PassManager pm(module->getContext());
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PassManager pm(module->getContext(), OpPassManager::Nesting::Implicit);
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TFL::QuantizationSpecs quant_specs;
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quant_specs.inference_type = tflite::TflTypeToTfType(inference_type);
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quant_specs.post_training_quantization = true;
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@ -57,7 +57,7 @@ TfLiteStatus SparsifyModel(const tflite::ModelT& input_model,
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return kTfLiteError;
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}
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PassManager pm(module->getContext());
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PassManager pm(module->getContext(), OpPassManager::Nesting::Implicit);
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pm.addPass(TFL::CreateDenseToSparsePass());
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if (failed(pm.run(module.get()))) {
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@ -45,18 +45,20 @@ const char kTFLiteDataLayout[] = "NHWC";
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void AddQuantizationPasses(const mlir::TFL::QuantizationSpecs& quant_specs,
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mlir::OpPassManager* pass_manager) {
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pass_manager->addPass(mlir::TFL::CreatePrepareQuantizePass(quant_specs));
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TFL::CreatePrepareQuantizePass(quant_specs));
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if (quant_specs.default_ranges.first.hasValue() ||
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quant_specs.default_ranges.second.hasValue()) {
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pass_manager->addPass(mlir::TFL::CreateDefaultQuantParamsPass(
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quant_specs.default_ranges.first.getValueOr(0.0),
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quant_specs.default_ranges.second.getValueOr(0.0),
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quant_specs.IsSignedInferenceType()));
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TFL::CreateDefaultQuantParamsPass(
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quant_specs.default_ranges.first.getValueOr(0.0),
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quant_specs.default_ranges.second.getValueOr(0.0),
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quant_specs.IsSignedInferenceType()));
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}
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pass_manager->addPass(mlir::TFL::CreateQuantizePass());
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pass_manager->addNestedPass<mlir::FuncOp>(mlir::TFL::CreateQuantizePass());
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bool emit_quant_adaptor_ops =
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quant_specs.inference_type != quant_specs.inference_input_type;
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pass_manager->addPass(
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TFL::CreatePostQuantizePass(emit_quant_adaptor_ops));
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}
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@ -67,7 +69,8 @@ void AddTFToTFLConversionPasses(const mlir::TFL::PassConfig& pass_config,
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standard_pipeline_options.enable_inliner = false;
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standard_pipeline_options.form_clusters = pass_config.form_clusters;
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mlir::TF::CreateTFStandardPipeline(*pass_manager, standard_pipeline_options);
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pass_manager->addPass(mlir::TF::CreateDeviceIndexSelectorPass());
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TF::CreateDeviceIndexSelectorPass());
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// Add canonicalize pass to remove no-op session initializer pass.
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pass_manager->addPass(mlir::createCanonicalizerPass());
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@ -155,7 +158,8 @@ void AddTFToTFLConversionPasses(const mlir::TFL::PassConfig& pass_config,
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pass_manager->addPass(mlir::createInlinerPass());
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// TODO(jpienaar): Revise post dialect constants.
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pass_manager->addPass(mlir::TF::CreateDecodeConstantPass());
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TF::CreateDecodeConstantPass());
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// Canonicalization includes const folding, which is utilized here to optimize
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// away ops that can't get constant folded after PrepareTF pass. For example,
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// tf.Conv2D is split into tf.Transpose and tfl.Conv2D.
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@ -178,11 +182,11 @@ void AddTFToTFLConversionPasses(const mlir::TFL::PassConfig& pass_config,
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// to match 'kTFLiteDataLayout'
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mlir::TF::LayoutOptimizationPipelineOptions layout_optimization_options;
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layout_optimization_options.force_data_format = kTFLiteDataLayout;
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mlir::TF::CreateLayoutOptimizationPipeline(*pass_manager,
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layout_optimization_options);
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mlir::TF::CreateLayoutOptimizationPipeline(
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pass_manager->nest<mlir::FuncOp>(), layout_optimization_options);
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// Prepare for TFLite dialect, rerun canonicalization, and then legalize to
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// the TFLite dialect.
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pass_manager->addPass(
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TFL::CreatePrepareTFPass(pass_config.unfold_batch_matmul));
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pass_manager->addNestedPass<mlir::FuncOp>(mlir::createCanonicalizerPass());
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if (pass_config.shape_inference) {
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@ -198,16 +202,18 @@ void AddTFToTFLConversionPasses(const mlir::TFL::PassConfig& pass_config,
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pass_manager->addPass(mlir::createInlinerPass());
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// This pass removes the asset file dependencies in hash table use cases.
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pass_manager->addPass(mlir::TF::CreateInitTextFileToImportPass());
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TF::CreateInitTextFileToImportPass());
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pass_manager->addPass(
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TFL::CreateLegalizeTFPass(pass_config.runtime_verification));
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pass_manager->addPass(mlir::TFL::CreateOptimizePass());
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pass_manager->addNestedPass<mlir::FuncOp>(mlir::TFL::CreateOptimizePass());
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// This pass operates on TensorFlow ops but is triggered after legalization
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// so that it can target constants introduced once TensorFlow Identity ops
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// are removed during legalization.
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pass_manager->addPass(mlir::TFL::CreateOptimizeFunctionalOpsPass());
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pass_manager->addPass(mlir::TFL::CreateRaiseCustomOpsPass());
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TFL::CreateRaiseCustomOpsPass());
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pass_manager->addPass(mlir::createSymbolDCEPass());
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pass_manager->addNestedPass<mlir::FuncOp>(mlir::createCanonicalizerPass());
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pass_manager->addNestedPass<mlir::FuncOp>(mlir::createCSEPass());
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@ -225,7 +231,8 @@ void AddTFToTFLConversionPasses(const mlir::TFL::PassConfig& pass_config,
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// it's not desired by TFL. This pass serves as a "fix" pass to split the
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// merged inputs until we have 1st class variable support or reuse
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// tf.variable to model this.
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pass_manager->addPass(mlir::TFL::CreateSplitMergedOperandsPass());
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pass_manager->addNestedPass<mlir::FuncOp>(
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mlir::TFL::CreateSplitMergedOperandsPass());
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}
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}
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@ -295,7 +302,7 @@ void CreateTFLStandardPipeline(OpPassManager& pm,
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pm.addPass(mlir::TFL::CreateWhileOutlinePass());
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pm.addPass(mlir::TFL::CreateRuntimeVerifyPass());
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pm.addNestedPass<mlir::FuncOp>(mlir::TFL::CreateRuntimeVerifyPass());
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}
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// Registers a pass pipeline for the standard TFL passes.
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@ -29,6 +29,7 @@ limitations under the License.
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#include "mlir/IR/MLIRContext.h" // from @llvm-project
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#include "mlir/IR/Module.h" // from @llvm-project
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#include "mlir/Pass/Pass.h" // from @llvm-project
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#include "mlir/Pass/PassManager.h" // from @llvm-project
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#include "mlir/Support/FileUtilities.h" // from @llvm-project
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#include "tensorflow/cc/saved_model/loader.h"
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#include "tensorflow/compiler/mlir/init_mlir.h"
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@ -187,7 +188,7 @@ int main(int argc, char **argv) {
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// message. So we can just return here.
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if (!module.ok()) return kTrFailure;
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mlir::PassManager pm(&context);
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mlir::PassManager pm(&context, mlir::OpPassManager::Nesting::Implicit);
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mlir::applyPassManagerCLOptions(pm);
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// Set the quantization specifications from the command line flags.
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@ -121,7 +121,7 @@ void CreateTPUBridgePipeline(OpPassManager &pm) {
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pm.addPass(CreateTPURewritePass());
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pm.addPass(createSymbolDCEPass());
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pm.addNestedPass<FuncOp>(TFDevice::CreateReplicateInvariantOpHoistingPass());
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pm.addNestedPass<FuncOp>(CreateTPUDynamicLayoutPass());
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pm.addPass(CreateTPUDynamicLayoutPass());
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pm.addNestedPass<FuncOp>(CreateTPUMergeVariablesWithExecutePass());
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pm.addNestedPass<FuncOp>(CreateTPUColocateCompositeResourceOps());
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pm.addPass(CreateTPUVariableReformattingPass());
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@ -50,7 +50,8 @@ Status MlirGraphOptimizationPass::Run(const ConfigProto& config_proto,
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// Assign optimal data layout to layout sensitive operations and delete
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// redundant transposes from the IR.
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LayoutOptimizationPipelineOptions layout_optimization_options;
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CreateLayoutOptimizationPipeline(pm, layout_optimization_options);
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CreateLayoutOptimizationPipeline(pm.nest<FuncOp>(),
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layout_optimization_options);
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// Prepare IR for exporting.
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pm.addPass(CreateBreakUpIslandsPass());
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@ -85,7 +85,7 @@ void InitTextFileToImportTestPass::runOnOperation() {
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// Run the lowering pass.
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PassManager pm(context);
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pm.addPass(CreateInitTextFileToImportPass());
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pm.addNestedPass<FuncOp>(CreateInitTextFileToImportPass());
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if (failed(pm.run(module))) return signalPassFailure();
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}
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@ -3569,17 +3569,20 @@ Status SavedModelSignatureDefImporter::LiftVariables() {
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mlir::PassManager pm(module_->getContext());
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SetCrashReproducer(pm);
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pm.addPass(mlir::tf_executor::CreateTFExecutorGraphPruningPass());
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pm.addPass(mlir::CreateExecutorDialectToFunctionalConversionPass());
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pm.addNestedPass<mlir::FuncOp>(
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mlir::tf_executor::CreateTFExecutorGraphPruningPass());
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pm.addNestedPass<mlir::FuncOp>(
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mlir::CreateExecutorDialectToFunctionalConversionPass());
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pm.addPass(
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mlir::tf_saved_model::CreateRemoveVariablesInSessionInitializerPass());
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pm.addPass(
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pm.addNestedPass<mlir::FuncOp>(
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mlir::TF::
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CreateConvertReadonlyReferenceVariablesToResourceVariablesPass());
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pm.addPass(mlir::TF::CreatePromoteVarHandlesToArgsPass());
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pm.addPass(
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mlir::tf_saved_model::CreateLiftVariablesPass(bundle_.GetSession()));
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pm.addPass(mlir::tf_saved_model::CreateDedupBoundInputBindingPass());
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pm.addNestedPass<mlir::FuncOp>(
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mlir::tf_saved_model::CreateDedupBoundInputBindingPass());
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if (mlir::failed(pm.run(*module_)))
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return diag_handler.Combine(errors::Internal("Failed to lift variables."));
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@ -279,7 +279,8 @@ void CreateConvertMlirToXlaHloPipeline(
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pm.addPass(mlir::TF::CreateTensorListOpsDecompositionPass());
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pm.addPass(mlir::TF::CreateStackOpsDecompositionPass());
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pm.addPass(mlir::TF::CreateTensorArrayOpsDecompositionPass());
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pm.addPass(mlir::TFDevice::CreateDecomposeResourceOpsPass());
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pm.addNestedPass<mlir::FuncOp>(
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mlir::TFDevice::CreateDecomposeResourceOpsPass());
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pm.addPass(mlir::TF::CreatePromoteResourcesToArgsPass());
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pm.addPass(mlir::createSymbolDCEPass());
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// Guarantee all functions have one use, which enables shape inference.
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@ -36,7 +36,7 @@ void AddTFToTFJSConversionPasses(mlir::OpPassManager* pm) {
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pm->addPass(mlir::tf_saved_model::CreateFreezeGlobalTensorsPass());
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// TFJS dialect passes.
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pm->addPass(mlir::tfjs::CreateOptimizePass());
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pm->addNestedPass<mlir::FuncOp>(mlir::tfjs::CreateOptimizePass());
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// Canonicalize, CSE etc.
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pm->addNestedPass<mlir::FuncOp>(mlir::createCanonicalizerPass());
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@ -75,7 +75,7 @@ Status LowerTFtoGPU(mlir::ModuleOp module, bool gpu_binary_only,
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applyTensorflowAndCLOptions(pm);
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if (gpu_binary_only) {
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pm.addPass(mlir::mhlo::createLegalizeTFPass(
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pm.addNestedPass<mlir::FuncOp>(mlir::mhlo::createLegalizeTFPass(
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/*allow_partial_conversion=*/false, /*legalize_chlo=*/true));
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pm.addNestedPass<mlir::FuncOp>(
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mlir::kernel_gen::transforms::CreateMaterializeBroadcastsPass());
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@ -83,23 +83,24 @@ Status LowerTFtoGPU(mlir::ModuleOp module, bool gpu_binary_only,
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mlir::kernel_gen::transforms::CreateUnfuseBatchNormPass());
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pm.addPass(mlir::mhlo::createLegalizeToLhloPass());
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// Moving `AllocOp`s and inserting missing `DeallocOp`s
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pm.addPass(::mlir::createBufferHoistingPass());
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pm.addPass(::mlir::createBufferDeallocationPass());
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pm.addNestedPass<mlir::FuncOp>(::mlir::createBufferHoistingPass());
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pm.addNestedPass<mlir::FuncOp>(::mlir::createBufferDeallocationPass());
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pm.addNestedPass<mlir::FuncOp>(mlir::createCopyRemovalPass());
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pm.addPass(mlir::createCanonicalizerPass());
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pm.addPass(mlir::kernel_gen::transforms::CreateShapeToDescriptorsPass());
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} else {
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pm.addPass(mlir::mhlo::createLegalizeTFPass(
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pm.addNestedPass<mlir::FuncOp>(mlir::mhlo::createLegalizeTFPass(
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/*allow_partial_conversion=*/false, /*legalize_chlo=*/false));
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pm.addPass(mlir::createTransformUnrankedHloPass());
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pm.addPass(mlir::mhlo::createChloLegalizeToHloPass());
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pm.addPass(mlir::createCanonicalizerPass());
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pm.addNestedPass<mlir::FuncOp>(mlir::createTransformUnrankedHloPass());
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pm.addNestedPass<mlir::FuncOp>(mlir::mhlo::createChloLegalizeToHloPass());
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pm.addNestedPass<mlir::FuncOp>(mlir::createCanonicalizerPass());
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pm.addPass(mlir::kernel_gen::transforms::CreateShapeToDescriptorsPass());
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// Clean up the IR created above. In particular, operations on descriptors
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// are simplified here.
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pm.addPass(mlir::createCanonicalizerPass());
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pm.addPass(mlir::kernel_gen::transforms::CreateBufferizePass());
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pm.addPass(mlir::kernel_gen::transforms::CreateParallelLoopsToSequential());
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pm.addNestedPass<mlir::FuncOp>(
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mlir::kernel_gen::transforms::CreateParallelLoopsToSequential());
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}
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// Clean up the IR for further processing.
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@ -119,36 +120,41 @@ Status LowerTFtoGPU(mlir::ModuleOp module, bool gpu_binary_only,
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tiling_for_unrolling.append(tile_sizes.begin(), tile_sizes.end());
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}
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// Transform LHLO operations to LinAlg.
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pm.addPass(::mlir::lmhlo::createLegalizeLhloToLinalgPass());
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pm.addNestedPass<mlir::FuncOp>(
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::mlir::lmhlo::createLegalizeLhloToLinalgPass());
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// Fuse linalg operations.
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pm.addPass(::mlir::lmhlo::createLhloFuseLinalgPass(
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pm.addNestedPass<mlir::FuncOp>(::mlir::lmhlo::createLhloFuseLinalgPass(
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/*use_parallel_loops=*/true, tiling_for_unrolling));
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// Transform the Linalg operations inside of the loop nest into parallel
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// loops.
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pm.addPass(::mlir::createConvertLinalgToParallelLoopsPass());
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pm.addNestedPass<mlir::FuncOp>(
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::mlir::createConvertLinalgToParallelLoopsPass());
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// Canonicalize the code to simplify index computations. This is needed so
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// that loop bounds have the same value.
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pm.addNestedPass<::mlir::FuncOp>(::mlir::createCanonicalizerPass());
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pm.addNestedPass<::mlir::FuncOp>(::mlir::createCSEPass());
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// Fuse the inner-most loops.
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pm.addPass(xla::mlir_gpu::createFuseInnerParallelLoopsPass());
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pm.addNestedPass<mlir::FuncOp>(
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xla::mlir_gpu::createFuseInnerParallelLoopsPass());
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// Run CSE to ensure that loads and stores to the same subview get
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// recognized as such.
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pm.addNestedPass<::mlir::FuncOp>(::mlir::createCSEPass());
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// Forward stores to buffers to loads.
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pm.addPass(xla::mlir_gpu::createStoreForwardingPass());
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pm.addNestedPass<mlir::FuncOp>(xla::mlir_gpu::createStoreForwardingPass());
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// Remove now unused temporary buffers.
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pm.addPass(xla::mlir_gpu::createDeadTempBufferRemovalPass());
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pm.addNestedPass<mlir::FuncOp>(
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xla::mlir_gpu::createDeadTempBufferRemovalPass());
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if (!unroll_factors.empty()) {
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pm.addPass(::mlir::createParallelLoopTilingPass(as_int64));
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pm.addNestedPass<mlir::FuncOp>(
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::mlir::createParallelLoopTilingPass(as_int64));
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}
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// Some basic cleanup.
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pm.addNestedPass<::mlir::FuncOp>(::mlir::createCanonicalizerPass());
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pm.addNestedPass<::mlir::FuncOp>(::mlir::createCSEPass());
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// Greedily map the remaining loop to GPU hardware dimensions.
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pm.addPass(xla::mlir_gpu::createMapParallelLoopsPass());
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pm.addNestedPass<::mlir::FuncOp>(xla::mlir_gpu::createMapParallelLoopsPass());
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// Apply the mapping.
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pm.addPass(mlir::createParallelLoopToGpuPass());
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pm.addNestedPass<::mlir::FuncOp>(mlir::createParallelLoopToGpuPass());
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// Embed TF Framework ops.
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if (!gpu_binary_only) {
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@ -171,12 +177,13 @@ Status LowerTFtoGPU(mlir::ModuleOp module, bool gpu_binary_only,
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if (gpu_binary_only) {
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// Make kernel signature deterministic so that we can call it externally.
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pm.addPass(xla::mlir_gpu::createRewriteKernelSignaturePass());
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pm.addNestedPass<::mlir::FuncOp>(
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xla::mlir_gpu::createRewriteKernelSignaturePass());
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}
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pm.addPass(::mlir::createLowerAffinePass());
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// Constraints are removed as late as possible and before lowering to CFG.
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pm.addPass(::mlir::createConvertShapeConstraintsPass());
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pm.addNestedPass<::mlir::FuncOp>(::mlir::createConvertShapeConstraintsPass());
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pm.addNestedPass<::mlir::FuncOp>(::mlir::createCanonicalizerPass());
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pm.addPass(::mlir::createLowerToCFGPass());
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@ -40,7 +40,8 @@ std::unique_ptr<llvm::Module> MakeLLVMModule(mlir::OwningModuleRef module,
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// TODO(kramerb): link this to the right option, command line flag, etc.
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constexpr bool kReassociateFPReductions = true;
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mlir::PassManager manager(module->getContext());
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mlir::PassManager manager(module->getContext(),
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mlir::OpPassManager::Nesting::Implicit);
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manager.addPass(mlir::createConvertLinalgToLoopsPass());
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manager.addPass(mlir::createLowerAffinePass());
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manager.addPass(mlir::createLowerToCFGPass());
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|
@ -70,49 +70,53 @@ Status LowerLHLOToGPU(mlir::ModuleOp module, LowerLHLOToGPUOptions options) {
|
||||
// Legalize from HLO to LHLO.
|
||||
pm.addPass(::mlir::mhlo::createLegalizeToLhloPass());
|
||||
// Moving `AllocOp`s and inserting missing `DeallocOp`s
|
||||
pm.addPass(::mlir::createBufferHoistingPass());
|
||||
pm.addPass(::mlir::createBufferDeallocationPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(::mlir::createBufferHoistingPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(::mlir::createBufferDeallocationPass());
|
||||
// Next, we can strip the outer fusion operation.
|
||||
pm.addPass(createFusionOpRemoverPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(createFusionOpRemoverPass());
|
||||
// Remove unnecessary LHLO copies.
|
||||
pm.addPass(::mlir::createCopyRemovalPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(::mlir::createCopyRemovalPass());
|
||||
// Legalize reduce operations directly to GPU dialect.
|
||||
pm.addPass(::mlir::lmhlo::createLegalizeToGpuPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(::mlir::lmhlo::createLegalizeToGpuPass());
|
||||
// Transform LHLO operations to LinAlg.
|
||||
pm.addPass(::mlir::lmhlo::createLegalizeLhloToLinalgPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(
|
||||
::mlir::lmhlo::createLegalizeLhloToLinalgPass());
|
||||
// Fuse linalg operations.
|
||||
pm.addPass(::mlir::lmhlo::createLhloFuseLinalgPass(
|
||||
pm.addNestedPass<mlir::FuncOp>(::mlir::lmhlo::createLhloFuseLinalgPass(
|
||||
/*use_parallel_loops=*/true, tiling_for_unrolling));
|
||||
// Transform the Linalg operations inside of the loop nest into parallel
|
||||
// loops.
|
||||
pm.addPass(::mlir::createConvertLinalgToParallelLoopsPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(
|
||||
::mlir::createConvertLinalgToParallelLoopsPass());
|
||||
// Canonicalize the code to simplify index computations. This is needed so
|
||||
// that loop bounds have the same value.
|
||||
pm.addNestedPass<::mlir::FuncOp>(::mlir::createCanonicalizerPass());
|
||||
pm.addNestedPass<::mlir::FuncOp>(::mlir::createCSEPass());
|
||||
// Fuse the inner-most loops.
|
||||
pm.addPass(createFuseInnerParallelLoopsPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(createFuseInnerParallelLoopsPass());
|
||||
// Run CSE to ensure that loads and stores to the same subview get
|
||||
// recognized as such.
|
||||
pm.addNestedPass<::mlir::FuncOp>(::mlir::createCSEPass());
|
||||
// Forward stores to buffers to loads.
|
||||
pm.addPass(createStoreForwardingPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(createStoreForwardingPass());
|
||||
// Remove now unused temporary buffers.
|
||||
pm.addPass(createDeadTempBufferRemovalPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(createDeadTempBufferRemovalPass());
|
||||
if (!options.unroll_factors.empty()) {
|
||||
pm.addPass(::mlir::createParallelLoopTilingPass(as_int64));
|
||||
pm.addNestedPass<mlir::FuncOp>(
|
||||
::mlir::createParallelLoopTilingPass(as_int64));
|
||||
}
|
||||
// Project all loop dimensions to X if necessary.
|
||||
if (options.collapse_parallel_loops) {
|
||||
pm.addPass(createParallelLoopCollapsingToFirstDimPass());
|
||||
pm.addNestedPass<mlir::FuncOp>(
|
||||
createParallelLoopCollapsingToFirstDimPass());
|
||||
}
|
||||
// Some basic cleanup.
|
||||
pm.addNestedPass<::mlir::FuncOp>(::mlir::createCanonicalizerPass());
|
||||
pm.addNestedPass<::mlir::FuncOp>(::mlir::createCSEPass());
|
||||
// Greedily map the remaining loop to GPU hardware dimensions.
|
||||
pm.addPass(createMapParallelLoopsPass());
|
||||
pm.addNestedPass<::mlir::FuncOp>(createMapParallelLoopsPass());
|
||||
// Apply the mapping.
|
||||
pm.addPass(mlir::createParallelLoopToGpuPass());
|
||||
pm.addNestedPass<::mlir::FuncOp>(mlir::createParallelLoopToGpuPass());
|
||||
// Some basic cleanup.
|
||||
pm.addNestedPass<::mlir::FuncOp>(::mlir::createCanonicalizerPass());
|
||||
pm.addNestedPass<::mlir::FuncOp>(::mlir::createCSEPass());
|
||||
@ -131,7 +135,7 @@ Status LowerLHLOToGPU(mlir::ModuleOp module, LowerLHLOToGPUOptions options) {
|
||||
// Make sure the kernel signature resembled the original function's
|
||||
// signature
|
||||
if (options.rewrite_signature) {
|
||||
pm.addPass(createRewriteKernelSignaturePass());
|
||||
pm.addNestedPass<::mlir::FuncOp>(createRewriteKernelSignaturePass());
|
||||
}
|
||||
if (failed(pm.run(module))) {
|
||||
return InternalError("Lowering to GPU kernels failed.");
|
||||
@ -179,8 +183,9 @@ class LowerToNVVMPass
|
||||
} // namespace
|
||||
|
||||
Status LowerKernelBodiesToNVVM(mlir::ModuleOp module) {
|
||||
::mlir::PassManager pm(module.getContext());
|
||||
// We cannot verify as the signature of the kernel is rewritten.
|
||||
::mlir::PassManager pm(module.getContext(), /*verifyPasses=*/false);
|
||||
pm.enableVerifier(false);
|
||||
tensorflow::applyTensorflowAndCLOptions(pm);
|
||||
|
||||
// Rewrite kernel functions to LLVM IR.
|
||||
@ -250,8 +255,9 @@ class LowerToROCDLPass
|
||||
} // namespace
|
||||
|
||||
Status LowerKernelBodiesToROCDL(mlir::ModuleOp module) {
|
||||
::mlir::PassManager pm(module.getContext());
|
||||
// We cannot verify as the signature of the kernel is rewritten.
|
||||
::mlir::PassManager pm(module.getContext(), /*verifyPasses=*/false);
|
||||
pm.enableVerifier(false);
|
||||
tensorflow::applyTensorflowAndCLOptions(pm);
|
||||
|
||||
auto enable_if_vlog_is_on = [](mlir::Pass*, mlir::Operation*) {
|
||||
|
@ -90,7 +90,8 @@ MlirCompiler::IRHook XlaGpuOpt::GetIRHookBreakingLoweringStage(
|
||||
LoweringStage breaking_stage) {
|
||||
return {[](mlir::ModuleOp module) -> Status {
|
||||
mlir::PassManager pm(module.getContext());
|
||||
pm.addPass(::mlir::createInjectErrorsForTestingPass());
|
||||
pm.addNestedPass<::mlir::FuncOp>(
|
||||
::mlir::createInjectErrorsForTestingPass());
|
||||
if (failed(pm.run(module))) {
|
||||
return InternalError("InjectErrorsForTestingPass failed.");
|
||||
}
|
||||
|
@ -686,8 +686,8 @@ def tf_repositories(path_prefix = "", tf_repo_name = ""):
|
||||
)
|
||||
|
||||
# Check out LLVM and MLIR from llvm-project.
|
||||
LLVM_COMMIT = "701456b52355c25089e1b536805164570f5def6f"
|
||||
LLVM_SHA256 = "de280defac064df7243ef4db30be85fbcff595669c6ac99033ed674215a630f3"
|
||||
LLVM_COMMIT = "33945cdd62c40ea4ce381d4c3d49b22f8a2cc015"
|
||||
LLVM_SHA256 = "37870dd2459898ab5f555676480b5c56b3279e323b0e9e1783c5641b88849d84"
|
||||
LLVM_URLS = [
|
||||
"https://storage.googleapis.com/mirror.tensorflow.org/github.com/llvm/llvm-project/archive/{commit}.tar.gz".format(commit = LLVM_COMMIT),
|
||||
"https://github.com/llvm/llvm-project/archive/{commit}.tar.gz".format(commit = LLVM_COMMIT),
|
||||
|
28
third_party/mlir/BUILD
vendored
28
third_party/mlir/BUILD
vendored
@ -106,7 +106,6 @@ cc_library(
|
||||
"lib/EDSC/Builders.cpp",
|
||||
],
|
||||
hdrs = [
|
||||
"include/mlir-c/Core.h",
|
||||
"include/mlir/EDSC/Builders.h",
|
||||
],
|
||||
includes = ["include"],
|
||||
@ -856,6 +855,16 @@ cc_library(
|
||||
],
|
||||
)
|
||||
|
||||
filegroup(
|
||||
name = "ShapeOpsTdFiles",
|
||||
srcs = [
|
||||
"include/mlir/Dialect/Shape/IR/ShapeBase.td",
|
||||
"include/mlir/Dialect/Shape/IR/ShapeOps.td",
|
||||
"include/mlir/Interfaces/InferTypeOpInterface.td",
|
||||
":StdOpsTdFiles",
|
||||
],
|
||||
)
|
||||
|
||||
gentbl(
|
||||
name = "ShapeOpsIncGen",
|
||||
strip_include_prefix = "include",
|
||||
@ -922,6 +931,22 @@ cc_library(
|
||||
],
|
||||
)
|
||||
|
||||
gentbl(
|
||||
name = "ShapeToStandardGen",
|
||||
strip_include_prefix = "lib/Conversion/ShapeToStandard",
|
||||
tbl_outs = [
|
||||
(
|
||||
"-gen-rewriters",
|
||||
"lib/Conversion/ShapeToStandard/ShapeToStandard.cpp.inc",
|
||||
),
|
||||
],
|
||||
tblgen = ":mlir-tblgen",
|
||||
td_file = "lib/Conversion/ShapeToStandard/ShapeToStandard.td",
|
||||
td_srcs = [
|
||||
":ShapeOpsTdFiles",
|
||||
],
|
||||
)
|
||||
|
||||
cc_library(
|
||||
name = "ShapeToStandard",
|
||||
srcs = glob([
|
||||
@ -936,6 +961,7 @@ cc_library(
|
||||
":Pass",
|
||||
":SCFDialect",
|
||||
":Shape",
|
||||
":ShapeToStandardGen",
|
||||
":StandardOps",
|
||||
":Support",
|
||||
":Transforms",
|
||||
|
2
third_party/mlir/test.BUILD
vendored
2
third_party/mlir/test.BUILD
vendored
@ -27,6 +27,7 @@ filegroup(
|
||||
"@llvm-project//mlir:include/mlir/IR/SymbolInterfaces.td",
|
||||
"@llvm-project//mlir:include/mlir/Interfaces/CallInterfaces.td",
|
||||
"@llvm-project//mlir:include/mlir/Interfaces/ControlFlowInterfaces.td",
|
||||
"@llvm-project//mlir:include/mlir/Interfaces/CopyOpInterface.td",
|
||||
"@llvm-project//mlir:include/mlir/Interfaces/InferTypeOpInterface.td",
|
||||
"@llvm-project//mlir:include/mlir/Interfaces/SideEffectInterfaces.td",
|
||||
],
|
||||
@ -140,6 +141,7 @@ cc_library(
|
||||
":TestTypeDefsIncGen",
|
||||
"@llvm-project//llvm:Support",
|
||||
"@llvm-project//mlir:ControlFlowInterfaces",
|
||||
"@llvm-project//mlir:CopyOpInterface",
|
||||
"@llvm-project//mlir:DerivedAttributeOpInterface",
|
||||
"@llvm-project//mlir:Dialect",
|
||||
"@llvm-project//mlir:IR",
|
||||
|
Loading…
Reference in New Issue
Block a user