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DepthwiseConv, dot-product kernel asm, small improvement to pack function.

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PiperOrigin-RevId: 247211629
This commit is contained in:
A. Unique TensorFlower 2019-05-08 07:49:32 -07:00 committed by TensorFlower Gardener
parent cc0ad492d2
commit b1ef5cc8cf
3 changed files with 245 additions and 251 deletions
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5
tensorflow/lite/kernels/internal/optimized/depthwiseconv_uint8_3x3_filter.h
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@ -6768,10 +6768,9 @@ struct PackMacroBlock<DepthwiseConvImplementation::kUseNeon3x3DotProduct,
TFLITE_DCHECK_EQ(start_width, 1);
TFLITE_DCHECK(leading_width_padding);
TFLITE_DCHECK(trailing_width_padding);
// ASM should use MOVI 64-bit set.
padding_mask = vcreate_u64(~0xffffff00L);
for (int k_height = 0; k_height < copy_block_height; ++k_height) {
half_work_reg = vdup_n_u8(-input_offset);
half_work_reg = vld1_lane_s8(reinterpret_cast<const int8*>(
input_block_data + input_block_offset),
half_work_reg, 1);
@ -6783,8 +6782,6 @@ struct PackMacroBlock<DepthwiseConvImplementation::kUseNeon3x3DotProduct,
vld1_lane_s8(reinterpret_cast<const int8*>(input_block_data +
input_block_offset + 2),
half_work_reg, 3);
half_work_reg =
vbsl_s8(padding_mask, vget_low_s8(padding_reg), half_work_reg);
half_work_reg = veor_s8(half_work_reg, vget_low_s8(sign_bit));
TFLITE_DCHECK_EQ(scratch_data_offset % 8, 0);

5
tensorflow/lite/kernels/internal/optimized/depthwiseconv_uint8_transitional.h
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@ -2054,10 +2054,9 @@ struct PackMacroBlock<DepthwiseConvImplementation::kUseIntrinsics3x3DotProduct,
TFLITE_DCHECK_EQ(start_width, 1);
TFLITE_DCHECK(leading_width_padding);
TFLITE_DCHECK(trailing_width_padding);
// ASM should use MOVI 64-bit set.
padding_mask = vcreate_u64(~0xffffff00L);
for (int k_height = 0; k_height < copy_block_height; ++k_height) {
half_work_reg = vdup_n_u8(-input_offset);
half_work_reg = vld1_lane_s8(reinterpret_cast<const int8*>(
input_block_data + input_block_offset),
half_work_reg, 1);
@ -2069,8 +2068,6 @@ struct PackMacroBlock<DepthwiseConvImplementation::kUseIntrinsics3x3DotProduct,
vld1_lane_s8(reinterpret_cast<const int8*>(input_block_data +
input_block_offset + 2),
half_work_reg, 3);
half_work_reg =
vbsl_s8(padding_mask, vget_low_s8(padding_reg), half_work_reg);
half_work_reg = veor_s8(half_work_reg, vget_low_s8(sign_bit));
TFLITE_DCHECK_EQ(scratch_data_offset % 8, 0);

486
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