Merge pull request #46160 from rkuester:feature-micro-add-op-space-to-depth-pr3
PiperOrigin-RevId: 350681169 Change-Id: I2331f30b11f6bbf0d1cabb8f6961bad0c4ab136d
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7719705955
tensorflow/lite/micro/kernels
166
tensorflow/lite/micro/kernels/space_to_depth.cc
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166
tensorflow/lite/micro/kernels/space_to_depth.cc
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/* Copyright 2017 The TensorFlow Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#include <stdint.h>
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#include "tensorflow/lite/c/builtin_op_data.h"
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#include "tensorflow/lite/c/common.h"
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#include "tensorflow/lite/kernels/internal/optimized/optimized_ops.h"
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#include "tensorflow/lite/kernels/internal/reference/reference_ops.h"
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#include "tensorflow/lite/kernels/internal/tensor.h"
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#include "tensorflow/lite/kernels/internal/tensor_ctypes.h"
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#include "tensorflow/lite/kernels/internal/types.h"
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#include "tensorflow/lite/kernels/kernel_util.h"
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namespace tflite {
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namespace ops {
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namespace builtin {
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namespace space_to_depth {
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// This file has two implementation of SpaceToDepth. Note that SpaceToDepth
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// only works on 4D tensors.
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enum KernelType {
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kReference,
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kGenericOptimized,
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};
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constexpr int kInputTensor = 0;
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constexpr int kOutputTensor = 0;
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TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
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auto* params =
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reinterpret_cast<TfLiteSpaceToDepthParams*>(node->builtin_data);
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TF_LITE_ENSURE_EQ(context, NumInputs(node), 1);
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TF_LITE_ENSURE_EQ(context, NumOutputs(node), 1);
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const TfLiteTensor* input;
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TF_LITE_ENSURE_OK(context, GetInputSafe(context, node, kInputTensor, &input));
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TfLiteTensor* output;
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TF_LITE_ENSURE_OK(context,
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GetOutputSafe(context, node, kOutputTensor, &output));
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TF_LITE_ENSURE_EQ(context, NumDimensions(input), 4);
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auto data_type = output->type;
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TF_LITE_ENSURE(context,
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data_type == kTfLiteFloat32 || data_type == kTfLiteUInt8 ||
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data_type == kTfLiteInt8 || data_type == kTfLiteInt32 ||
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data_type == kTfLiteInt64);
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TF_LITE_ENSURE_TYPES_EQ(context, input->type, output->type);
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const int block_size = params->block_size;
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const int input_height = input->dims->data[1];
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const int input_width = input->dims->data[2];
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int output_height = input_height / block_size;
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int output_width = input_width / block_size;
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TF_LITE_ENSURE_EQ(context, input_height, output_height * block_size);
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TF_LITE_ENSURE_EQ(context, input_width, output_width * block_size);
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TfLiteIntArray* output_size = TfLiteIntArrayCreate(4);
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output_size->data[0] = input->dims->data[0];
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output_size->data[1] = output_height;
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output_size->data[2] = output_width;
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output_size->data[3] = input->dims->data[3] * block_size * block_size;
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return context->ResizeTensor(context, output, output_size);
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}
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template <KernelType kernel_type>
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TfLiteStatus Eval(TfLiteContext* context, TfLiteNode* node) {
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auto* params =
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reinterpret_cast<TfLiteSpaceToDepthParams*>(node->builtin_data);
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const TfLiteTensor* input;
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TF_LITE_ENSURE_OK(context, GetInputSafe(context, node, kInputTensor, &input));
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TfLiteTensor* output;
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TF_LITE_ENSURE_OK(context,
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GetOutputSafe(context, node, kOutputTensor, &output));
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#define TF_LITE_SPACE_TO_DEPTH(type, scalar) \
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tflite::SpaceToDepthParams op_params; \
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op_params.block_size = params->block_size; \
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type::SpaceToDepth(op_params, GetTensorShape(input), \
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GetTensorData<scalar>(input), GetTensorShape(output), \
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GetTensorData<scalar>(output))
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switch (input->type) { // Already know in/out types are same.
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case kTfLiteFloat32:
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if (kernel_type == kReference) {
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TF_LITE_SPACE_TO_DEPTH(reference_ops, float);
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} else {
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TF_LITE_SPACE_TO_DEPTH(optimized_ops, float);
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}
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break;
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case kTfLiteUInt8:
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if (kernel_type == kReference) {
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TF_LITE_SPACE_TO_DEPTH(reference_ops, uint8_t);
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} else {
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TF_LITE_SPACE_TO_DEPTH(optimized_ops, uint8_t);
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}
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break;
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case kTfLiteInt8:
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if (kernel_type == kReference) {
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TF_LITE_SPACE_TO_DEPTH(reference_ops, int8_t);
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} else {
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TF_LITE_SPACE_TO_DEPTH(optimized_ops, int8_t);
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}
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break;
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case kTfLiteInt32:
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if (kernel_type == kReference) {
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TF_LITE_SPACE_TO_DEPTH(reference_ops, int32_t);
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} else {
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TF_LITE_SPACE_TO_DEPTH(optimized_ops, int32_t);
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}
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break;
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case kTfLiteInt64:
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if (kernel_type == kReference) {
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TF_LITE_SPACE_TO_DEPTH(reference_ops, int64_t);
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} else {
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TF_LITE_SPACE_TO_DEPTH(optimized_ops, int64_t);
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}
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break;
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default:
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TF_LITE_KERNEL_LOG(context, "Type '%s' not currently supported.",
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TfLiteTypeGetName(input->type));
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return kTfLiteError;
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}
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#undef TF_LITE_SPACE_TO_DEPTH
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return kTfLiteOk;
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}
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} // namespace space_to_depth
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TfLiteRegistration* Register_SPACE_TO_DEPTH_REF() {
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static TfLiteRegistration r = {
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nullptr, nullptr, space_to_depth::Prepare,
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space_to_depth::Eval<space_to_depth::kReference>};
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return &r;
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}
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TfLiteRegistration* Register_SPACE_TO_DEPTH_GENERIC_OPT() {
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static TfLiteRegistration r = {
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nullptr, nullptr, space_to_depth::Prepare,
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space_to_depth::Eval<space_to_depth::kGenericOptimized>};
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return &r;
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}
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TfLiteRegistration* Register_SPACE_TO_DEPTH() {
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return Register_SPACE_TO_DEPTH_GENERIC_OPT();
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}
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} // namespace builtin
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} // namespace ops
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} // namespace tflite
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tensorflow/lite/micro/kernels/space_to_depth_test.cc
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tensorflow/lite/micro/kernels/space_to_depth_test.cc
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/* Copyright 2017 The TensorFlow Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#include <stdint.h>
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#include <initializer_list>
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#include <vector>
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#include "flatbuffers/flatbuffers.h" // from @flatbuffers
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#include "tensorflow/lite/kernels/test_util.h"
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#include "tensorflow/lite/schema/schema_generated.h"
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namespace tflite {
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namespace {
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using ::testing::ElementsAre;
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using ::testing::ElementsAreArray;
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class SpaceToDepthOpModel : public SingleOpModel {
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public:
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SpaceToDepthOpModel(const TensorData& tensor_data, int block_size) {
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input_ = AddInput(tensor_data);
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output_ = AddOutput(tensor_data);
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SetBuiltinOp(BuiltinOperator_SPACE_TO_DEPTH,
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BuiltinOptions_SpaceToDepthOptions,
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CreateSpaceToDepthOptions(builder_, block_size).Union());
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BuildInterpreter({GetShape(input_)});
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}
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template <typename T>
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void SetInput(std::initializer_list<T> data) {
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PopulateTensor<T>(input_, data);
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}
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template <typename T>
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std::vector<T> GetOutput() {
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return ExtractVector<T>(output_);
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}
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std::vector<int> GetOutputShape() { return GetTensorShape(output_); }
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private:
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int input_;
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int output_;
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};
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#ifdef GTEST_HAS_DEATH_TEST
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TEST(SpaceToDepthOpModel, BadBlockSize) {
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EXPECT_DEATH(SpaceToDepthOpModel({TensorType_FLOAT32, {1, 2, 2, 1}}, 3),
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"Cannot allocate tensors");
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}
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#endif
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TEST(SpaceToDepthOpModel, Float32) {
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SpaceToDepthOpModel m({TensorType_FLOAT32, {1, 2, 2, 2}}, 2);
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m.SetInput<float>({1.4, 2.3, 3.2, 4.1, 5.4, 6.3, 7.2, 8.1});
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m.Invoke();
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EXPECT_THAT(m.GetOutput<float>(),
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ElementsAreArray({1.4, 2.3, 3.2, 4.1, 5.4, 6.3, 7.2, 8.1}));
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 8));
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}
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TEST(SpaceToDepthOpModel, Uint8) {
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SpaceToDepthOpModel m({TensorType_UINT8, {1, 2, 2, 1}}, 2);
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m.SetInput<uint8_t>({1, 2, 3, 4});
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m.Invoke();
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EXPECT_THAT(m.GetOutput<uint8_t>(), ElementsAreArray({1, 2, 3, 4}));
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 4));
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}
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TEST(SpaceToDepthOpModel, int8) {
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SpaceToDepthOpModel m({TensorType_INT8, {1, 2, 2, 1}}, 2);
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m.SetInput<int8_t>({1, 2, 3, 4});
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m.Invoke();
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EXPECT_THAT(m.GetOutput<int8_t>(), ElementsAreArray({1, 2, 3, 4}));
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 4));
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}
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TEST(SpaceToDepthOpModel, Int32) {
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SpaceToDepthOpModel m({TensorType_INT32, {1, 2, 2, 3}}, 2);
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m.SetInput<int32_t>({1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12});
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m.Invoke();
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EXPECT_THAT(m.GetOutput<int32_t>(),
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ElementsAreArray({1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12}));
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 12));
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}
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TEST(SpaceToDepthOpModel, Int64) {
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SpaceToDepthOpModel m({TensorType_INT64, {1, 4, 4, 1}}, 2);
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m.SetInput<int64_t>({1, 2, 5, 6, 3, 4, 7, 8, 9, 10, 13, 14, 11, 12, 15, 16});
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m.Invoke();
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EXPECT_THAT(m.GetOutput<int64_t>(),
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ElementsAreArray(
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{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}));
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 2, 2, 4));
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}
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} // namespace
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} // namespace tflite
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