Merge pull request from rkuester:feature-micro-add-op-space-to-depth-pr3

PiperOrigin-RevId: 350681169
Change-Id: I2331f30b11f6bbf0d1cabb8f6961bad0c4ab136d
This commit is contained in:
TensorFlower Gardener 2021-01-07 19:09:18 -08:00
commit 7719705955
2 changed files with 274 additions and 0 deletions
tensorflow/lite/micro/kernels

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/* Copyright 2017 The TensorFlow Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
==============================================================================*/
#include <stdint.h>
#include "tensorflow/lite/c/builtin_op_data.h"
#include "tensorflow/lite/c/common.h"
#include "tensorflow/lite/kernels/internal/optimized/optimized_ops.h"
#include "tensorflow/lite/kernels/internal/reference/reference_ops.h"
#include "tensorflow/lite/kernels/internal/tensor.h"
#include "tensorflow/lite/kernels/internal/tensor_ctypes.h"
#include "tensorflow/lite/kernels/internal/types.h"
#include "tensorflow/lite/kernels/kernel_util.h"
namespace tflite {
namespace ops {
namespace builtin {
namespace space_to_depth {
// This file has two implementation of SpaceToDepth. Note that SpaceToDepth
// only works on 4D tensors.
enum KernelType {
kReference,
kGenericOptimized,
};
constexpr int kInputTensor = 0;
constexpr int kOutputTensor = 0;
TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
auto* params =
reinterpret_cast<TfLiteSpaceToDepthParams*>(node->builtin_data);
TF_LITE_ENSURE_EQ(context, NumInputs(node), 1);
TF_LITE_ENSURE_EQ(context, NumOutputs(node), 1);
const TfLiteTensor* input;
TF_LITE_ENSURE_OK(context, GetInputSafe(context, node, kInputTensor, &input));
TfLiteTensor* output;
TF_LITE_ENSURE_OK(context,
GetOutputSafe(context, node, kOutputTensor, &output));
TF_LITE_ENSURE_EQ(context, NumDimensions(input), 4);
auto data_type = output->type;
TF_LITE_ENSURE(context,
data_type == kTfLiteFloat32 || data_type == kTfLiteUInt8 ||
data_type == kTfLiteInt8 || data_type == kTfLiteInt32 ||
data_type == kTfLiteInt64);
TF_LITE_ENSURE_TYPES_EQ(context, input->type, output->type);
const int block_size = params->block_size;
const int input_height = input->dims->data[1];
const int input_width = input->dims->data[2];
int output_height = input_height / block_size;
int output_width = input_width / block_size;
TF_LITE_ENSURE_EQ(context, input_height, output_height * block_size);
TF_LITE_ENSURE_EQ(context, input_width, output_width * block_size);
TfLiteIntArray* output_size = TfLiteIntArrayCreate(4);
output_size->data[0] = input->dims->data[0];
output_size->data[1] = output_height;
output_size->data[2] = output_width;
output_size->data[3] = input->dims->data[3] * block_size * block_size;
return context->ResizeTensor(context, output, output_size);
}
template <KernelType kernel_type>
TfLiteStatus Eval(TfLiteContext* context, TfLiteNode* node) {
auto* params =
reinterpret_cast<TfLiteSpaceToDepthParams*>(node->builtin_data);
const TfLiteTensor* input;
TF_LITE_ENSURE_OK(context, GetInputSafe(context, node, kInputTensor, &input));
TfLiteTensor* output;
TF_LITE_ENSURE_OK(context,
GetOutputSafe(context, node, kOutputTensor, &output));
#define TF_LITE_SPACE_TO_DEPTH(type, scalar) \
tflite::SpaceToDepthParams op_params; \
op_params.block_size = params->block_size; \
type::SpaceToDepth(op_params, GetTensorShape(input), \
GetTensorData<scalar>(input), GetTensorShape(output), \
GetTensorData<scalar>(output))
switch (input->type) { // Already know in/out types are same.
case kTfLiteFloat32:
if (kernel_type == kReference) {
TF_LITE_SPACE_TO_DEPTH(reference_ops, float);
} else {
TF_LITE_SPACE_TO_DEPTH(optimized_ops, float);
}
break;
case kTfLiteUInt8:
if (kernel_type == kReference) {
TF_LITE_SPACE_TO_DEPTH(reference_ops, uint8_t);
} else {
TF_LITE_SPACE_TO_DEPTH(optimized_ops, uint8_t);
}
break;
case kTfLiteInt8:
if (kernel_type == kReference) {
TF_LITE_SPACE_TO_DEPTH(reference_ops, int8_t);
} else {
TF_LITE_SPACE_TO_DEPTH(optimized_ops, int8_t);
}
break;
case kTfLiteInt32:
if (kernel_type == kReference) {
TF_LITE_SPACE_TO_DEPTH(reference_ops, int32_t);
} else {
TF_LITE_SPACE_TO_DEPTH(optimized_ops, int32_t);
}
break;
case kTfLiteInt64:
if (kernel_type == kReference) {
TF_LITE_SPACE_TO_DEPTH(reference_ops, int64_t);
} else {
TF_LITE_SPACE_TO_DEPTH(optimized_ops, int64_t);
}
break;
default:
TF_LITE_KERNEL_LOG(context, "Type '%s' not currently supported.",
TfLiteTypeGetName(input->type));
return kTfLiteError;
}
#undef TF_LITE_SPACE_TO_DEPTH
return kTfLiteOk;
}
} // namespace space_to_depth
TfLiteRegistration* Register_SPACE_TO_DEPTH_REF() {
static TfLiteRegistration r = {
nullptr, nullptr, space_to_depth::Prepare,
space_to_depth::Eval<space_to_depth::kReference>};
return &r;
}
TfLiteRegistration* Register_SPACE_TO_DEPTH_GENERIC_OPT() {
static TfLiteRegistration r = {
nullptr, nullptr, space_to_depth::Prepare,
space_to_depth::Eval<space_to_depth::kGenericOptimized>};
return &r;
}
TfLiteRegistration* Register_SPACE_TO_DEPTH() {
return Register_SPACE_TO_DEPTH_GENERIC_OPT();
}
} // namespace builtin
} // namespace ops
} // namespace tflite

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/* Copyright 2017 The TensorFlow Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
==============================================================================*/
#include <stdint.h>
#include <initializer_list>
#include <vector>
#include "flatbuffers/flatbuffers.h" // from @flatbuffers
#include "tensorflow/lite/kernels/test_util.h"
#include "tensorflow/lite/schema/schema_generated.h"
namespace tflite {
namespace {
using ::testing::ElementsAre;
using ::testing::ElementsAreArray;
class SpaceToDepthOpModel : public SingleOpModel {
public:
SpaceToDepthOpModel(const TensorData& tensor_data, int block_size) {
input_ = AddInput(tensor_data);
output_ = AddOutput(tensor_data);
SetBuiltinOp(BuiltinOperator_SPACE_TO_DEPTH,
BuiltinOptions_SpaceToDepthOptions,
CreateSpaceToDepthOptions(builder_, block_size).Union());
BuildInterpreter({GetShape(input_)});
}
template <typename T>
void SetInput(std::initializer_list<T> data) {
PopulateTensor<T>(input_, data);
}
template <typename T>
std::vector<T> GetOutput() {
return ExtractVector<T>(output_);
}
std::vector<int> GetOutputShape() { return GetTensorShape(output_); }
private:
int input_;
int output_;
};
#ifdef GTEST_HAS_DEATH_TEST
TEST(SpaceToDepthOpModel, BadBlockSize) {
EXPECT_DEATH(SpaceToDepthOpModel({TensorType_FLOAT32, {1, 2, 2, 1}}, 3),
"Cannot allocate tensors");
}
#endif
TEST(SpaceToDepthOpModel, Float32) {
SpaceToDepthOpModel m({TensorType_FLOAT32, {1, 2, 2, 2}}, 2);
m.SetInput<float>({1.4, 2.3, 3.2, 4.1, 5.4, 6.3, 7.2, 8.1});
m.Invoke();
EXPECT_THAT(m.GetOutput<float>(),
ElementsAreArray({1.4, 2.3, 3.2, 4.1, 5.4, 6.3, 7.2, 8.1}));
EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 8));
}
TEST(SpaceToDepthOpModel, Uint8) {
SpaceToDepthOpModel m({TensorType_UINT8, {1, 2, 2, 1}}, 2);
m.SetInput<uint8_t>({1, 2, 3, 4});
m.Invoke();
EXPECT_THAT(m.GetOutput<uint8_t>(), ElementsAreArray({1, 2, 3, 4}));
EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 4));
}
TEST(SpaceToDepthOpModel, int8) {
SpaceToDepthOpModel m({TensorType_INT8, {1, 2, 2, 1}}, 2);
m.SetInput<int8_t>({1, 2, 3, 4});
m.Invoke();
EXPECT_THAT(m.GetOutput<int8_t>(), ElementsAreArray({1, 2, 3, 4}));
EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 4));
}
TEST(SpaceToDepthOpModel, Int32) {
SpaceToDepthOpModel m({TensorType_INT32, {1, 2, 2, 3}}, 2);
m.SetInput<int32_t>({1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12});
m.Invoke();
EXPECT_THAT(m.GetOutput<int32_t>(),
ElementsAreArray({1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12}));
EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 12));
}
TEST(SpaceToDepthOpModel, Int64) {
SpaceToDepthOpModel m({TensorType_INT64, {1, 4, 4, 1}}, 2);
m.SetInput<int64_t>({1, 2, 5, 6, 3, 4, 7, 8, 9, 10, 13, 14, 11, 12, 15, 16});
m.Invoke();
EXPECT_THAT(m.GetOutput<int64_t>(),
ElementsAreArray(
{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}));
EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 2, 2, 4));
}
} // namespace
} // namespace tflite