diff --git a/tensorflow/core/kernels/cwise_op_gpu_log.cu.cc b/tensorflow/core/kernels/cwise_op_gpu_log.cu.cc index a17d310bc8d..da7d7a996e6 100644 --- a/tensorflow/core/kernels/cwise_op_gpu_log.cu.cc +++ b/tensorflow/core/kernels/cwise_op_gpu_log.cu.cc @@ -19,7 +19,9 @@ limitations under the License. namespace tensorflow { namespace functor { +#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED) DEFINE_UNARY3(log, Eigen::half, float, double); +#endif } // namespace functor } // namespace tensorflow diff --git a/tensorflow/core/kernels/cwise_op_gpu_log1p.cu.cc b/tensorflow/core/kernels/cwise_op_gpu_log1p.cu.cc index 842aaf5d08e..6cc9fa7e806 100644 --- a/tensorflow/core/kernels/cwise_op_gpu_log1p.cu.cc +++ b/tensorflow/core/kernels/cwise_op_gpu_log1p.cu.cc @@ -19,7 +19,9 @@ limitations under the License. namespace tensorflow { namespace functor { +#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED) DEFINE_UNARY3(log1p, Eigen::half, float, double); +#endif } // namespace functor } // namespace tensorflow diff --git a/tensorflow/core/kernels/cwise_op_log.cc b/tensorflow/core/kernels/cwise_op_log.cc index 6efce168ac4..317bba54ad5 100644 --- a/tensorflow/core/kernels/cwise_op_log.cc +++ b/tensorflow/core/kernels/cwise_op_log.cc @@ -20,8 +20,7 @@ REGISTER6(UnaryOp, CPU, "Log", functor::log, float, Eigen::half, double, bfloat16, complex64, complex128); #if GOOGLE_CUDA || TENSORFLOW_USE_ROCM -#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED) || \ - !defined(MLIR_GENERATED_EXPERIMENTAL_GPU_KERNELS_ENABLED) +#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED) REGISTER3(UnaryOp, GPU, "Log", functor::log, float, Eigen::half, double); #endif #endif diff --git a/tensorflow/core/kernels/cwise_op_log1p.cc b/tensorflow/core/kernels/cwise_op_log1p.cc index 2c1a8bdbf7b..eae2c80d944 100644 --- a/tensorflow/core/kernels/cwise_op_log1p.cc +++ b/tensorflow/core/kernels/cwise_op_log1p.cc @@ -20,8 +20,7 @@ REGISTER6(UnaryOp, CPU, "Log1p", functor::log1p, float, Eigen::half, bfloat16, double, complex64, complex128); #if GOOGLE_CUDA || TENSORFLOW_USE_ROCM -#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED) || \ - !defined(MLIR_GENERATED_EXPERIMENTAL_GPU_KERNELS_ENABLED) +#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED) REGISTER3(UnaryOp, GPU, "Log1p", functor::log1p, float, Eigen::half, double); #endif #endif diff --git a/tensorflow/core/kernels/mlir_generated/BUILD b/tensorflow/core/kernels/mlir_generated/BUILD index b6ea132315d..41414446380 100644 --- a/tensorflow/core/kernels/mlir_generated/BUILD +++ b/tensorflow/core/kernels/mlir_generated/BUILD @@ -52,6 +52,8 @@ filegroup( "gpu_op_floor.cc", "gpu_op_imag.cc", "gpu_op_invert.cc", + "gpu_op_log.cc", + "gpu_op_log1p.cc", "gpu_op_logical_not.cc", "gpu_op_neg.cc", "gpu_op_real.cc", @@ -76,8 +78,6 @@ filegroup( "gpu_op_is_inf.cc", "gpu_op_is_nan.cc", "gpu_op_lgamma.cc", - "gpu_op_log.cc", - "gpu_op_log1p.cc", "gpu_op_rsqrt.cc", "gpu_op_sign.cc", "gpu_op_sin.cc",