Merge pull request #36386 from ROCmSoftwarePlatform:google-upstream-pr-gpu_unrolling_test
PiperOrigin-RevId: 292641827 Change-Id: I6e5f6c4030de2a6b7566f7837cc97d8639378fe5
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commit
0989420102
@ -154,12 +154,21 @@ TEST_F(GpuUnrollingTest, DisabledUnrollUnfusedSine) {
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auto hlo_module =
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ParseAndReturnVerifiedModule(kUnfusedAddModule, config).ValueOrDie();
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CompileAndVerifyIr(std::move(hlo_module),
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R"(
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// Note: On ROCm side, we do bare minimal to make the test pass.
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// "sine" function is in different code generation path from nvptx: on
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// ROCm platform, it get pulled in from ROCm-Device-Libs, whereas in
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// Cuda, generated llvm IR is compiled PTX.
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auto expected_ir = is_built_with_rocm_ ? R"(
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; CHECK: __ocml_sin_f32
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; CHECK-NOT: load float
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)"
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: R"(
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; CHECK: load float
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; CHECK-NOT: load float
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}
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)",
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)";
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CompileAndVerifyIr(std::move(hlo_module), expected_ir,
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/*match_optimized_ir=*/true);
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}
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@ -179,12 +188,21 @@ TEST_F(GpuUnrollingTest, DisabledUnrollUnfusedCosine) {
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auto hlo_module =
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ParseAndReturnVerifiedModule(kUnfusedAddModule, config).ValueOrDie();
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CompileAndVerifyIr(std::move(hlo_module),
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R"(
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// Note: On ROCm side, we do bare minimal to make the test pass.
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// "cosine" function is in different code generation path from nvptx: on
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// ROCm platform, it get pulled in from ROCm-Device-Libs, whereas in
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// Cuda, generated llvm IR is compiled PTX.
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auto expected_ir = is_built_with_rocm_ ? R"(
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; CHECK: __ocml_cos_f32
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; CHECK-NOT: load float
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)"
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: R"(
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; CHECK: load float
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; CHECK-NOT: load float
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}
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)",
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)";
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CompileAndVerifyIr(std::move(hlo_module), expected_ir,
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/*match_optimized_ir=*/true);
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}
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